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Add support for the RISC-V architecture
author
Michael Jeanson
<mjeanson@efficios.com>
Wed, 21 Mar 2018 21:38:41 +0000
(17:38 -0400)
committer
Mathieu Desnoyers
<mathieu.desnoyers@efficios.com>
Fri, 23 Mar 2018 21:51:28 +0000
(17:51 -0400)
Tested in QEMU 2.12.0-rc0, requires --disable-compiler-tls to go
through the benchmarks reliably.
Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
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