include/urcu/uatomic/riscv.h

   1 // SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com>
   2 //
   3 // SPDX-License-Identifier: MIT
   4
   5 /*
   6  * Atomic exchange operations for the RISC-V architecture.
   7  *
   8  * Let the compiler do it.
   9  */
  10
  11 #ifndef _URCU_ARCH_UATOMIC_RISCV_H
  12 #define _URCU_ARCH_UATOMIC_RISCV_H
  13
  14 #include <urcu/compiler.h>
  15 #include <urcu/system.h>
  16
  17 /*
  18  * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details.
  19  *
  20  * Until the following patches are backported, Userspace RCU is broken for the
  21  * RISC-V architecture when compiled with GCC.
  22  *
  23  *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
  24  *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
  25  *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6>
  26  */
  27 #ifdef URCU_GCC_VERSION
  28 # error "Implementations of some atomic operations of GCC for RISC-V are insufficient for sequential consistency. For this reason Userspace RCU is currently marked as 'broken' for RISC-V with GCC. However, it is still possible to use other toolchains."
  29 #endif
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define UATOMIC_HAS_ATOMIC_BYTE
  36 #define UATOMIC_HAS_ATOMIC_SHORT
  37
  38 #ifdef __cplusplus
  39 }
  40 #endif
  41
  42 #include <urcu/uatomic/generic.h>
  43
  44 #endif /* _URCU_ARCH_UATOMIC_RISCV_H */