uatomic/x86: Remove redundant memory barriers
[urcu.git] / include / urcu / arch / sparc64.h
1 // SPDX-FileCopyrightText: 2009 Paul E. McKenney, IBM Corporation.
2 // SPDX-FileCopyrightText: 2009 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
3 //
4 // SPDX-License-Identifier: LGPL-2.1-or-later
5
6 #ifndef _URCU_ARCH_SPARC64_H
7 #define _URCU_ARCH_SPARC64_H
8
9 /*
10 * arch_sparc64.h: trivial definitions for the Sparc64 architecture.
11 */
12
13 #include <urcu/compiler.h>
14 #include <urcu/config.h>
15 #include <urcu/syscall-compat.h>
16
17 #ifdef __cplusplus
18 extern "C" {
19 #endif
20
21 /*
22 * On Linux, define the membarrier system call number if not yet available in
23 * the system headers.
24 */
25 #if (defined(__linux__) && !defined(__NR_membarrier))
26 #define __NR_membarrier 351
27 #endif
28
29 #define CAA_CACHE_LINE_SIZE 256
30
31 /*
32 * Inspired from the Linux kernel. Workaround Spitfire bug #51.
33 */
34 #define membar_safe(type) \
35 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
36 "membar " type "\n" \
37 "1:\n" \
38 : : : "memory")
39
40 #define cmm_mb() membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad")
41 #define cmm_rmb() membar_safe("#LoadLoad")
42 #define cmm_wmb() membar_safe("#StoreStore")
43
44 #ifdef __cplusplus
45 }
46 #endif
47
48 #include <urcu/arch/generic.h>
49
50 #endif /* _URCU_ARCH_SPARC64_H */
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