extern __thread long ust_reg_stack[500];
extern volatile __thread long *ust_reg_stack_ptr;
-#define ____cacheline_aligned __attribute__((aligned(CACHE_LINE_SIZE)))
+#define ____cacheline_aligned __attribute__((aligned(CAA_CACHE_LINE_SIZE)))
#ifdef __i386
/* Start TLS access of private reg stack pointer */ \
".byte 0x66\n\t" \
"leaq ust_reg_stack_ptr@tlsgd(%%rip), %%rdi\n\t" \
- ".word 0x6666\n\t" \
+ ".hword 0x6666\n\t" \
"rex64\n\t" \
"call __tls_get_addr@plt\n\t" \
/* --- End TLS access */ \
/* Start TLS access of private reg stack */ \
".byte 0x66\n\t" \
"leaq ust_reg_stack@tlsgd(%%rip), %%rdi\n\t" \
- ".word 0x6666\n\t" \
+ ".hword 0x6666\n\t" \
"rex64\n\t" \
"call __tls_get_addr@plt\n\t" \
/* --- End TLS access */ \