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1 // SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com>
3 // SPDX-License-Identifier: MIT
6 * Atomic exchange operations for the RISC-V architecture.
8 * Let the compiler do it.
12 * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details.
14 * Until the following patches are backported, Userspace RCU is broken for the
15 * RISC-V architecture when compiled with GCC.
17 * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
18 * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
19 * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6>
22 # error "Implementations of some atomic operations of GCC for RISC-V \
23 are insufficient for sequential consistency. For this reason \
24 Userspace RCU is currently marked as 'broken' for RISC-V with \
25 GCC. However, it is still possible to use other toolchains."
28 #ifndef _URCU_ARCH_UATOMIC_RISCV_H
29 #define _URCU_ARCH_UATOMIC_RISCV_H
31 #include <urcu/compiler.h>
32 #include <urcu/system.h>
38 #define UATOMIC_HAS_ATOMIC_BYTE
39 #define UATOMIC_HAS_ATOMIC_SHORT
45 #include <urcu/uatomic/generic.h>
47 #endif /* _URCU_ARCH_UATOMIC_RISCV_H */
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