2 * mem.spin: Promela code to validate memory barriers with out-of-order memory
3 * and out-of-order instruction scheduling.
13 * alpha = 1; beta = 1;
15 * x = beta; y = alpha;
17 * if x = 0, then y != 0
18 * if y = 0, then x != 0
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License as published by
22 * the Free Software Foundation; either version 2 of the License, or
23 * (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 * Copyright (c) 2009 Mathieu Desnoyers
37 /* Promela validation variables. */
40 * Produced process control and data flow. Updated after each instruction to
41 * show which variables are ready. Using one-hot bit encoding per variable to
42 * save state space. Used as triggers to execute the instructions having those
43 * variables as input. Leaving bits active to inhibit instruction execution.
44 * Scheme used to make instruction disabling and automatic dependency fall-back
48 #define CONSUME_TOKENS(state, bits, notbits) \
49 ((!(state & (notbits))) && (state & (bits)) == (bits))
51 #define PRODUCE_TOKENS(state, bits) \
52 state = state | (bits);
54 #define CLEAR_TOKENS(state, bits) \
55 state = state & ~(bits)
59 #define get_pid() (_pid)
62 * Each process have its own data in cache. Caches are randomly updated.
63 * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces
67 #define DECLARE_CACHED_VAR(type, x, v) \
69 type cached_##x[NR_PROCS] = v; \
70 bit cache_dirty_##x[NR_PROCS] = 0;
72 #define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id])
74 #define READ_CACHED_VAR(x) \
75 (cached_##x[get_pid()])
77 #define WRITE_CACHED_VAR(x, v) \
79 cached_##x[get_pid()] = v; \
80 cache_dirty_##x[get_pid()] = 1; \
83 #define CACHE_WRITE_TO_MEM(x, id) \
85 :: IS_CACHE_DIRTY(x, id) -> \
86 mem_##x = cached_##x[id]; \
87 cache_dirty_##x[id] = 0; \
92 #define CACHE_READ_FROM_MEM(x, id) \
94 :: !IS_CACHE_DIRTY(x, id) -> \
95 cached_##x[id] = mem_##x; \
101 * May update other caches if cache is dirty, or not.
103 #define RANDOM_CACHE_WRITE_TO_MEM(x, id) \
105 :: 1 -> CACHE_WRITE_TO_MEM(x, id); \
109 #define RANDOM_CACHE_READ_FROM_MEM(x, id)\
111 :: 1 -> CACHE_READ_FROM_MEM(x, id); \
118 RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid());
119 RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid());
120 RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid());
121 RANDOM_CACHE_READ_FROM_MEM(beta, get_pid());
125 /* must consume all prior read tokens */
129 /* todo : consume all read tokens .. ? */
130 CACHE_READ_FROM_MEM(alpha, get_pid());
131 CACHE_READ_FROM_MEM(beta, get_pid());
135 /* must consume all prior write tokens */
139 CACHE_WRITE_TO_MEM(alpha, get_pid());
140 CACHE_WRITE_TO_MEM(beta, get_pid());
144 /* sync_core() must consume all prior read and write tokens, including rmb/wmb
147 /* must consume all prior read and write tokens */
157 /* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */
158 DECLARE_CACHED_VAR(byte, alpha, 0);
159 DECLARE_CACHED_VAR(byte, beta, 0);
161 /* value 2 is uninitialized */
166 * Bit encoding, proc_one_produced :
169 #define P1_PROD_NONE (1 << 0)
171 #define P1_WRITE (1 << 1)
172 #define P1_WMB (1 << 2)
173 #define P1_SYNC_CORE (1 << 3)
174 #define P1_RMB (1 << 4)
175 #define P1_READ (1 << 5)
177 int proc_one_produced;
179 active proctype test_proc_one()
181 assert(get_pid() < NR_PROCS);
183 PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE);
186 PRODUCE_TOKENS(proc_one_produced, P1_WMB);
189 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
192 PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
196 :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) ->
198 WRITE_CACHED_VAR(alpha, 1);
200 PRODUCE_TOKENS(proc_one_produced, P1_WRITE);
201 :: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) ->
203 PRODUCE_TOKENS(proc_one_produced, P1_WMB);
204 :: CONSUME_TOKENS(proc_one_produced, P1_WRITE | P1_WMB, P1_SYNC_CORE) ->
206 PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
207 :: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) ->
209 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
210 :: CONSUME_TOKENS(proc_one_produced, P1_RMB | P1_SYNC_CORE, P1_READ) ->
212 read_one = READ_CACHED_VAR(beta);
214 PRODUCE_TOKENS(proc_one_produced, P1_READ);
215 :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE | P1_WRITE
216 | P1_WMB | P1_SYNC_CORE | P1_RMB | P1_READ, 0) ->
220 //CLEAR_TOKENS(proc_one_produced,
221 // P1_PROD_NONE | P1_WRITE | P1_WMB | P1_SYNC_CORE | P1_RMB |
224 // test : [] (read_one == 0 -> read_two != 0)
225 // test : [] (read_two == 0 -> read_one != 0)
226 assert(!(read_one == 0 && read_two == 0));
231 * Bit encoding, proc_two_produced :
234 #define P2_PROD_NONE (1 << 0)
236 #define P2_WRITE (1 << 1)
237 #define P2_WMB (1 << 2)
238 #define P2_SYNC_CORE (1 << 3)
239 #define P2_RMB (1 << 4)
240 #define P2_READ (1 << 5)
242 int proc_two_produced;
244 active proctype test_proc_two()
246 assert(get_pid() < NR_PROCS);
248 PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE);
251 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
254 PRODUCE_TOKENS(proc_two_produced, P2_RMB);
257 PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
261 :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) ->
263 WRITE_CACHED_VAR(beta, 1);
265 PRODUCE_TOKENS(proc_two_produced, P2_WRITE);
266 :: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) ->
268 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
269 :: CONSUME_TOKENS(proc_two_produced, P2_WRITE | P2_WMB, P2_SYNC_CORE) ->
271 PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
272 :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) ->
274 PRODUCE_TOKENS(proc_two_produced, P2_RMB);
275 :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE | P2_RMB, P2_READ) ->
277 read_two = READ_CACHED_VAR(alpha);
279 PRODUCE_TOKENS(proc_two_produced, P2_READ);
280 :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE | P2_WRITE
281 | P2_WMB | P2_SYNC_CORE | P2_RMB | P2_READ, 0) ->
285 //CLEAR_TOKENS(proc_two_produced,
286 // P2_PROD_NONE | P2_WRITE | P2_WMB | P2_SYNC_CORE | P2_RMB |
289 // test : [] (read_one == 0 -> read_two != 0)
290 // test : [] (read_two == 0 -> read_one != 0)
291 assert(!(read_one == 0 && read_two == 0));