2 * mem.spin: Promela code to validate memory barriers with OOO memory.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * Copyright (c) 2009 Mathieu Desnoyers
21 /* Promela validation variables. */
24 * Produced process control and data flow. Updated after each instruction to
25 * show which variables are ready. Using one-hot bit encoding per variable to
26 * save state space. Used as triggers to execute the instructions having those
27 * variables as input. Leaving bits active to inhibit instruction execution.
28 * Scheme used to make instruction disabling and automatic dependency fall-back
32 #define CONSUME_TOKENS(state, bits, notbits) \
33 ((!(state & (notbits))) && (state & (bits)) == (bits))
35 #define PRODUCE_TOKENS(state, bits) \
36 state = state | (bits);
38 #define CLEAR_TOKENS(state, bits) \
39 state = state & ~(bits)
43 #define get_pid() (_pid)
46 * Each process have its own data in cache. Caches are randomly updated.
47 * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces
51 #define DECLARE_CACHED_VAR(type, x, v) \
53 type cached_##x[NR_PROCS] = v; \
54 bit cache_dirty_##x[NR_PROCS] = 0;
56 #define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id])
58 #define READ_CACHED_VAR(x) \
59 (cached_##x[get_pid()])
61 #define WRITE_CACHED_VAR(x, v) \
63 cached_##x[get_pid()] = v; \
64 cache_dirty_##x[get_pid()] = 1; \
67 #define CACHE_WRITE_TO_MEM(x, id) \
69 :: IS_CACHE_DIRTY(x, id) -> \
70 mem_##x = cached_##x[id]; \
71 cache_dirty_##x[id] = 0; \
76 #define CACHE_READ_FROM_MEM(x, id) \
78 :: !IS_CACHE_DIRTY(x, id) -> \
79 cached_##x[id] = mem_##x; \
85 * May update other caches if cache is dirty, or not.
87 #define RANDOM_CACHE_WRITE_TO_MEM(x, id) \
89 :: 1 -> CACHE_WRITE_TO_MEM(x, id); \
93 #define RANDOM_CACHE_READ_FROM_MEM(x, id)\
95 :: 1 -> CACHE_READ_FROM_MEM(x, id); \
102 RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid());
103 RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid());
104 RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid());
105 RANDOM_CACHE_READ_FROM_MEM(beta, get_pid());
109 /* must consume all prior read tokens */
113 /* todo : consume all read tokens .. ? */
114 CACHE_READ_FROM_MEM(alpha, get_pid());
115 CACHE_READ_FROM_MEM(beta, get_pid());
119 /* must consume all prior write tokens */
123 CACHE_WRITE_TO_MEM(alpha, get_pid());
124 CACHE_WRITE_TO_MEM(beta, get_pid());
128 /* sync_core() must consume all prior read and write tokens, including rmb/wmb
131 /* must consume all prior read and write tokens */
141 /* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */
142 DECLARE_CACHED_VAR(byte, alpha, 0);
143 DECLARE_CACHED_VAR(byte, beta, 0);
145 /* value 2 is uninitialized */
150 * Bit encoding, proc_one_produced :
153 #define P1_PROD_NONE (1 << 0)
155 #define P1_WRITE (1 << 1)
156 #define P1_WMB (1 << 2)
157 #define P1_SYNC_CORE (1 << 3)
158 #define P1_RMB (1 << 4)
159 #define P1_READ (1 << 5)
161 int proc_one_produced;
163 active proctype test_proc_one()
165 assert(get_pid() < NR_PROCS);
167 PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE);
170 PRODUCE_TOKENS(proc_one_produced, P1_WMB);
173 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
176 PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
180 :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) ->
182 WRITE_CACHED_VAR(alpha, 1);
184 PRODUCE_TOKENS(proc_one_produced, P1_WRITE);
185 :: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) ->
187 PRODUCE_TOKENS(proc_one_produced, P1_WMB);
188 :: CONSUME_TOKENS(proc_one_produced, P1_WRITE | P1_WMB, P1_SYNC_CORE) ->
190 PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
191 :: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) ->
193 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
194 :: CONSUME_TOKENS(proc_one_produced, P1_RMB | P1_SYNC_CORE, P1_READ) ->
196 read_one = READ_CACHED_VAR(beta);
198 PRODUCE_TOKENS(proc_one_produced, P1_READ);
199 :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE | P1_WRITE
200 | P1_WMB | P1_SYNC_CORE | P1_RMB | P1_READ, 0) ->
204 //CLEAR_TOKENS(proc_one_produced,
205 // P1_PROD_NONE | P1_WRITE | P1_WMB | P1_SYNC_CORE | P1_RMB |
208 // test : [] (read_one == 0 -> read_two != 0)
209 // test : [] (read_two == 0 -> read_one != 0)
210 assert(!(read_one == 0 && read_two == 0));
215 * Bit encoding, proc_two_produced :
218 #define P2_PROD_NONE (1 << 0)
220 #define P2_WRITE (1 << 1)
221 #define P2_WMB (1 << 2)
222 #define P2_SYNC_CORE (1 << 3)
223 #define P2_RMB (1 << 4)
224 #define P2_READ (1 << 5)
226 int proc_two_produced;
228 active proctype test_proc_two()
230 assert(get_pid() < NR_PROCS);
232 PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE);
235 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
238 PRODUCE_TOKENS(proc_two_produced, P2_RMB);
241 PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
245 :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) ->
247 WRITE_CACHED_VAR(beta, 1);
249 PRODUCE_TOKENS(proc_two_produced, P2_WRITE);
250 :: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) ->
252 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
253 :: CONSUME_TOKENS(proc_two_produced, P2_WRITE | P2_WMB, P2_SYNC_CORE) ->
255 PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
256 :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) ->
258 PRODUCE_TOKENS(proc_two_produced, P2_RMB);
259 :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE | P2_RMB, P2_READ) ->
261 read_two = READ_CACHED_VAR(alpha);
263 PRODUCE_TOKENS(proc_two_produced, P2_READ);
264 :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE | P2_WRITE
265 | P2_WMB | P2_SYNC_CORE | P2_RMB | P2_READ, 0) ->
269 //CLEAR_TOKENS(proc_two_produced,
270 // P2_PROD_NONE | P2_WRITE | P2_WMB | P2_SYNC_CORE | P2_RMB |
273 // test : [] (read_one == 0 -> read_two != 0)
274 // test : [] (read_two == 0 -> read_one != 0)
275 assert(!(read_one == 0 && read_two == 0));