| 1 | // SPDX-FileCopyrightText: 2021 Wang Jing <wangjing@loongson.cn> |
| 2 | // |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | |
| 5 | #ifndef _URCU_UATOMIC_ARCH_LOONGARCH_H |
| 6 | #define _URCU_UATOMIC_ARCH_LOONGARCH_H |
| 7 | |
| 8 | /* |
| 9 | * Atomic exchange operations for the LoongArch architecture. Let GCC do it. |
| 10 | */ |
| 11 | |
| 12 | #include <urcu/compiler.h> |
| 13 | #include <urcu/system.h> |
| 14 | |
| 15 | #ifdef __cplusplus |
| 16 | extern "C" { |
| 17 | #endif |
| 18 | |
| 19 | /* |
| 20 | * LoongArch implements byte and short atomics with LL/SC instructions, |
| 21 | * which retry if the cache line is modified concurrently between LL and |
| 22 | * SC. |
| 23 | */ |
| 24 | #define UATOMIC_HAS_ATOMIC_BYTE |
| 25 | #define UATOMIC_HAS_ATOMIC_SHORT |
| 26 | |
| 27 | #ifdef __cplusplus |
| 28 | } |
| 29 | #endif |
| 30 | |
| 31 | #include <urcu/uatomic/generic.h> |
| 32 | |
| 33 | #endif /* _URCU_UATOMIC_ARCH_LOONGARCH_H */ |