urcu/uatomic/riscv: Mark RISC-V as broken
[urcu.git] / include / urcu / uatomic / arm.h
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1// SPDX-FileCopyrightText: 1991-1994 by Xerox Corporation. All rights reserved.
2// SPDX-FileCopyrightText: 1996-1999 by Silicon Graphics. All rights reserved.
3// SPDX-FileCopyrightText: 1999-2004 Hewlett-Packard Development Company, L.P.
4// SPDX-FileCopyrightText: 2009 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
5// SPDX-FileCopyrightText: 2010 Paul E. McKenney, IBM Corporation
6//
7// SPDX-License-Identifier: LicenseRef-Boehm-GC
8
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9#ifndef _URCU_ARCH_UATOMIC_ARM_H
10#define _URCU_ARCH_UATOMIC_ARM_H
fdbddd0b 11
67ecffc0 12/*
6aca0125 13 * Atomics for ARM. This approach is usable on kernels back to 2.6.15.
fdbddd0b 14 *
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15 * Code inspired from libuatomic_ops-1.2, inherited in part from the
16 * Boehm-Demers-Weiser conservative garbage collector.
17 */
18
19#include <urcu/compiler.h>
20#include <urcu/system.h>
c278ffc7 21#include <urcu/arch.h>
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22
23#ifdef __cplusplus
24extern "C" {
67ecffc0 25#endif
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26
27/* xchg */
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28
29/*
30 * Based on [1], __sync_lock_test_and_set() is not a full barrier, but
31 * instead only an acquire barrier. Given that uatomic_xchg() acts as
32 * both release and acquire barriers, we therefore need to have our own
33 * release barrier before this operation.
34 *
35 * [1] https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
36 */
37#define uatomic_xchg(addr, v) \
38 ({ \
39 cmm_smp_mb(); \
40 __sync_lock_test_and_set(addr, v); \
41 })
fdbddd0b 42
67ecffc0 43#ifdef __cplusplus
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44}
45#endif
46
a2e7bf9c 47#include <urcu/uatomic/generic.h>
fdbddd0b 48
6aca0125 49#endif /* _URCU_ARCH_UATOMIC_ARM_H */
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