Commit | Line | Data |
---|---|---|
d3d3857f MJ |
1 | // SPDX-FileCopyrightText: 2020 Michael Jeanson <mjeanson@efficios.com> |
2 | // | |
3 | // SPDX-License-Identifier: LGPL-2.1-or-later | |
0b1e236d MJ |
4 | |
5 | #ifndef _URCU_ARCH_H | |
6 | #define _URCU_ARCH_H | |
7 | ||
8 | /* | |
9 | * Architecture detection using compiler defines. | |
10 | * | |
11 | * The following defines are used internally for architecture specific code. | |
12 | * | |
13 | * URCU_ARCH_X86 : All x86 variants 32 and 64 bits | |
14 | * URCU_ARCH_I386 : Specific to the i386 | |
15 | * URCU_ARCH_AMD64 : All 64 bits x86 variants | |
16 | * URCU_ARCH_K1OM : Specific to the Xeon Phi / MIC | |
17 | * | |
18 | * URCU_ARCH_PPC : All PowerPC variants 32 and 64 bits | |
19 | * URCU_ARCH_PPC64 : Specific to 64 bits variants | |
20 | * | |
21 | * URCU_ARCH_S390 : All IBM s390 / s390x variants | |
22 | * | |
23 | * URCU_ARCH_SPARC64 : All Sun SPARC variants | |
24 | * | |
25 | * URCU_ARCH_ALPHA : All DEC Alpha variants | |
26 | * URCU_ARCH_IA64 : All Intel Itanium variants | |
27 | * URCU_ARCH_ARM : All ARM 32 bits variants | |
9260f372 | 28 | * URCU_ARCH_ARMV7 : All ARMv7 ISA variants |
0b1e236d MJ |
29 | * URCU_ARCH_AARCH64 : All ARM 64 bits variants |
30 | * URCU_ARCH_MIPS : All MIPS variants | |
31 | * URCU_ARCH_NIOS2 : All Intel / Altera NIOS II variants | |
32 | * URCU_ARCH_TILE : All Tilera TILE variants | |
33 | * URCU_ARCH_HPPA : All HP PA-RISC variants | |
34 | * URCU_ARCH_M68K : All Motorola 68000 variants | |
35 | * URCU_ARCH_RISCV : All RISC-V variants | |
dc46a9c3 | 36 | * URCU_ARCH_LOONGARCH : All LoongArch variants |
0b1e236d | 37 | */ |
c966839e MJ |
38 | |
39 | #if (defined(__INTEL_OFFLOAD) || defined(__TARGET_ARCH_MIC) || defined(__MIC__)) | |
0b1e236d MJ |
40 | |
41 | #define URCU_ARCH_X86 1 | |
c966839e MJ |
42 | #define URCU_ARCH_AMD64 1 |
43 | #define URCU_ARCH_K1OM 1 | |
0b1e236d MJ |
44 | #include <urcu/arch/x86.h> |
45 | ||
c966839e | 46 | #elif (defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64)) |
0b1e236d MJ |
47 | |
48 | #define URCU_ARCH_X86 1 | |
c966839e | 49 | #define URCU_ARCH_AMD64 1 |
0b1e236d MJ |
50 | #include <urcu/arch/x86.h> |
51 | ||
5ee14170 | 52 | #elif (defined(__i386__) || defined(__i386)) |
0b1e236d MJ |
53 | |
54 | #define URCU_ARCH_X86 1 | |
0b1e236d | 55 | |
101389e4 MJ |
56 | /* |
57 | * URCU_ARCH_X86_NO_CAS enables a compat layer that will detect the presence of | |
58 | * the cmpxchg instructions at runtime and provide a compat mode based on a | |
59 | * pthread mutex when it isn't. | |
60 | * | |
61 | * __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 was introduced in GCC 4.3 and Clang 3.3, | |
62 | * building with older compilers will result in the compat layer always being | |
63 | * used on x86-32. | |
64 | */ | |
65 | #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 | |
66 | #define URCU_ARCH_X86_NO_CAS 1 | |
67 | /* For backwards compat */ | |
c966839e | 68 | #define URCU_ARCH_I386 1 |
101389e4 MJ |
69 | #endif |
70 | ||
0b1e236d MJ |
71 | #include <urcu/arch/x86.h> |
72 | ||
c966839e | 73 | #elif (defined(__powerpc64__) || defined(__ppc64__)) |
0b1e236d MJ |
74 | |
75 | #define URCU_ARCH_PPC 1 | |
c966839e | 76 | #define URCU_ARCH_PPC64 1 |
0b1e236d MJ |
77 | #include <urcu/arch/ppc.h> |
78 | ||
c966839e | 79 | #elif (defined(__powerpc__) || defined(__powerpc) || defined(__ppc__)) |
0b1e236d MJ |
80 | |
81 | #define URCU_ARCH_PPC 1 | |
0b1e236d MJ |
82 | #include <urcu/arch/ppc.h> |
83 | ||
84 | #elif (defined(__s390__) || defined(__s390x__) || defined(__zarch__)) | |
85 | ||
86 | #define URCU_ARCH_S390 1 | |
87 | #include <urcu/arch/s390.h> | |
88 | ||
89 | #elif (defined(__sparc__) || defined(__sparc) || defined(__sparc64__)) | |
90 | ||
91 | #define URCU_ARCH_SPARC64 1 | |
92 | #include <urcu/arch/sparc64.h> | |
93 | ||
94 | #elif (defined(__alpha__) || defined(__alpha)) | |
95 | ||
96 | #define URCU_ARCH_ALPHA 1 | |
97 | #include <urcu/arch/alpha.h> | |
98 | ||
99 | #elif (defined(__ia64__) || defined(__ia64)) | |
100 | ||
101 | #define URCU_ARCH_IA64 1 | |
102 | #include <urcu/arch/ia64.h> | |
103 | ||
9260f372 MJ |
104 | #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7__)) |
105 | ||
106 | #define URCU_ARCH_ARMV7 1 | |
107 | #define URCU_ARCH_ARM 1 | |
108 | #include <urcu/arch/arm.h> | |
109 | ||
0b1e236d MJ |
110 | #elif (defined(__arm__) || defined(__arm)) |
111 | ||
112 | #define URCU_ARCH_ARM 1 | |
113 | #include <urcu/arch/arm.h> | |
114 | ||
115 | #elif defined(__aarch64__) | |
116 | ||
117 | #define URCU_ARCH_AARCH64 1 | |
118 | #include <urcu/arch/aarch64.h> | |
119 | ||
120 | #elif (defined(__mips__) || defined(__mips)) | |
121 | ||
122 | #define URCU_ARCH_MIPS 1 | |
123 | #include <urcu/arch/mips.h> | |
124 | ||
125 | #elif (defined(__nios2__) || defined(__nios2)) | |
126 | ||
127 | #define URCU_ARCH_NIOS2 1 | |
128 | #include <urcu/arch/nios2.h> | |
129 | ||
130 | #elif defined(__tilegx__) | |
131 | /* | |
132 | * URCU has only been tested on the TileGx architecture. For other Tile* | |
133 | * architectures, please run the tests first and report the results to the | |
134 | * maintainer so that proper support can be added. | |
135 | */ | |
136 | ||
137 | #define URCU_ARCH_TILE 1 | |
138 | #include <urcu/arch/tile.h> | |
139 | ||
140 | #elif (defined(__hppa__) || defined(__HPPA__) || defined(__hppa)) | |
141 | ||
142 | #define URCU_ARCH_HPPA 1 | |
143 | #include <urcu/arch/hppa.h> | |
144 | ||
145 | #elif defined(__m68k__) | |
146 | ||
147 | #define URCU_ARCH_M68K 1 | |
148 | #include <urcu/arch/m68k.h> | |
149 | ||
150 | #elif defined(__riscv) | |
151 | ||
152 | #define URCU_ARCH_RISCV 1 | |
153 | #include <urcu/arch/riscv.h> | |
154 | ||
dc46a9c3 WJ |
155 | #elif defined(__loongarch__) |
156 | ||
157 | #define URCU_ARCH_LOONGARCH 1 | |
158 | #include <urcu/arch/loongarch.h> | |
159 | ||
0b1e236d MJ |
160 | #else |
161 | #error "Cannot build: unrecognized architecture, see <urcu/arch.h>." | |
162 | #endif | |
163 | ||
0e2125fb OD |
164 | #ifdef CONFIG_RCU_EMIT_LEGACY_MB |
165 | # define cmm_emit_legacy_smp_mb() cmm_smp_mb() | |
166 | #else | |
167 | # define cmm_emit_legacy_smp_mb() do { } while (0) | |
168 | #endif | |
169 | ||
0b1e236d MJ |
170 | |
171 | #endif /* _URCU_ARCH_H */ |