Commit | Line | Data |
---|---|---|
d3d3857f MJ |
1 | // SPDX-FileCopyrightText: 2020 Michael Jeanson <mjeanson@efficios.com> |
2 | // | |
3 | // SPDX-License-Identifier: LGPL-2.1-or-later | |
0b1e236d MJ |
4 | |
5 | #ifndef _URCU_ARCH_H | |
6 | #define _URCU_ARCH_H | |
7 | ||
8 | /* | |
9 | * Architecture detection using compiler defines. | |
10 | * | |
11 | * The following defines are used internally for architecture specific code. | |
12 | * | |
13 | * URCU_ARCH_X86 : All x86 variants 32 and 64 bits | |
14 | * URCU_ARCH_I386 : Specific to the i386 | |
15 | * URCU_ARCH_AMD64 : All 64 bits x86 variants | |
16 | * URCU_ARCH_K1OM : Specific to the Xeon Phi / MIC | |
17 | * | |
18 | * URCU_ARCH_PPC : All PowerPC variants 32 and 64 bits | |
19 | * URCU_ARCH_PPC64 : Specific to 64 bits variants | |
20 | * | |
21 | * URCU_ARCH_S390 : All IBM s390 / s390x variants | |
22 | * | |
23 | * URCU_ARCH_SPARC64 : All Sun SPARC variants | |
24 | * | |
25 | * URCU_ARCH_ALPHA : All DEC Alpha variants | |
26 | * URCU_ARCH_IA64 : All Intel Itanium variants | |
27 | * URCU_ARCH_ARM : All ARM 32 bits variants | |
9260f372 | 28 | * URCU_ARCH_ARMV7 : All ARMv7 ISA variants |
0b1e236d MJ |
29 | * URCU_ARCH_AARCH64 : All ARM 64 bits variants |
30 | * URCU_ARCH_MIPS : All MIPS variants | |
31 | * URCU_ARCH_NIOS2 : All Intel / Altera NIOS II variants | |
32 | * URCU_ARCH_TILE : All Tilera TILE variants | |
33 | * URCU_ARCH_HPPA : All HP PA-RISC variants | |
34 | * URCU_ARCH_M68K : All Motorola 68000 variants | |
35 | * URCU_ARCH_RISCV : All RISC-V variants | |
36 | */ | |
c966839e MJ |
37 | |
38 | #if (defined(__INTEL_OFFLOAD) || defined(__TARGET_ARCH_MIC) || defined(__MIC__)) | |
0b1e236d MJ |
39 | |
40 | #define URCU_ARCH_X86 1 | |
c966839e MJ |
41 | #define URCU_ARCH_AMD64 1 |
42 | #define URCU_ARCH_K1OM 1 | |
0b1e236d MJ |
43 | #include <urcu/arch/x86.h> |
44 | ||
c966839e | 45 | #elif (defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64)) |
0b1e236d MJ |
46 | |
47 | #define URCU_ARCH_X86 1 | |
c966839e | 48 | #define URCU_ARCH_AMD64 1 |
0b1e236d MJ |
49 | #include <urcu/arch/x86.h> |
50 | ||
5ee14170 | 51 | #elif (defined(__i386__) || defined(__i386)) |
0b1e236d MJ |
52 | |
53 | #define URCU_ARCH_X86 1 | |
0b1e236d | 54 | |
101389e4 MJ |
55 | /* |
56 | * URCU_ARCH_X86_NO_CAS enables a compat layer that will detect the presence of | |
57 | * the cmpxchg instructions at runtime and provide a compat mode based on a | |
58 | * pthread mutex when it isn't. | |
59 | * | |
60 | * __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 was introduced in GCC 4.3 and Clang 3.3, | |
61 | * building with older compilers will result in the compat layer always being | |
62 | * used on x86-32. | |
63 | */ | |
64 | #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 | |
65 | #define URCU_ARCH_X86_NO_CAS 1 | |
66 | /* For backwards compat */ | |
c966839e | 67 | #define URCU_ARCH_I386 1 |
101389e4 MJ |
68 | #endif |
69 | ||
0b1e236d MJ |
70 | #include <urcu/arch/x86.h> |
71 | ||
c966839e | 72 | #elif (defined(__powerpc64__) || defined(__ppc64__)) |
0b1e236d MJ |
73 | |
74 | #define URCU_ARCH_PPC 1 | |
c966839e | 75 | #define URCU_ARCH_PPC64 1 |
0b1e236d MJ |
76 | #include <urcu/arch/ppc.h> |
77 | ||
c966839e | 78 | #elif (defined(__powerpc__) || defined(__powerpc) || defined(__ppc__)) |
0b1e236d MJ |
79 | |
80 | #define URCU_ARCH_PPC 1 | |
0b1e236d MJ |
81 | #include <urcu/arch/ppc.h> |
82 | ||
83 | #elif (defined(__s390__) || defined(__s390x__) || defined(__zarch__)) | |
84 | ||
85 | #define URCU_ARCH_S390 1 | |
86 | #include <urcu/arch/s390.h> | |
87 | ||
88 | #elif (defined(__sparc__) || defined(__sparc) || defined(__sparc64__)) | |
89 | ||
90 | #define URCU_ARCH_SPARC64 1 | |
91 | #include <urcu/arch/sparc64.h> | |
92 | ||
93 | #elif (defined(__alpha__) || defined(__alpha)) | |
94 | ||
95 | #define URCU_ARCH_ALPHA 1 | |
96 | #include <urcu/arch/alpha.h> | |
97 | ||
98 | #elif (defined(__ia64__) || defined(__ia64)) | |
99 | ||
100 | #define URCU_ARCH_IA64 1 | |
101 | #include <urcu/arch/ia64.h> | |
102 | ||
9260f372 MJ |
103 | #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7__)) |
104 | ||
105 | #define URCU_ARCH_ARMV7 1 | |
106 | #define URCU_ARCH_ARM 1 | |
107 | #include <urcu/arch/arm.h> | |
108 | ||
0b1e236d MJ |
109 | #elif (defined(__arm__) || defined(__arm)) |
110 | ||
111 | #define URCU_ARCH_ARM 1 | |
112 | #include <urcu/arch/arm.h> | |
113 | ||
114 | #elif defined(__aarch64__) | |
115 | ||
116 | #define URCU_ARCH_AARCH64 1 | |
117 | #include <urcu/arch/aarch64.h> | |
118 | ||
119 | #elif (defined(__mips__) || defined(__mips)) | |
120 | ||
121 | #define URCU_ARCH_MIPS 1 | |
122 | #include <urcu/arch/mips.h> | |
123 | ||
124 | #elif (defined(__nios2__) || defined(__nios2)) | |
125 | ||
126 | #define URCU_ARCH_NIOS2 1 | |
127 | #include <urcu/arch/nios2.h> | |
128 | ||
129 | #elif defined(__tilegx__) | |
130 | /* | |
131 | * URCU has only been tested on the TileGx architecture. For other Tile* | |
132 | * architectures, please run the tests first and report the results to the | |
133 | * maintainer so that proper support can be added. | |
134 | */ | |
135 | ||
136 | #define URCU_ARCH_TILE 1 | |
137 | #include <urcu/arch/tile.h> | |
138 | ||
139 | #elif (defined(__hppa__) || defined(__HPPA__) || defined(__hppa)) | |
140 | ||
141 | #define URCU_ARCH_HPPA 1 | |
142 | #include <urcu/arch/hppa.h> | |
143 | ||
144 | #elif defined(__m68k__) | |
145 | ||
146 | #define URCU_ARCH_M68K 1 | |
147 | #include <urcu/arch/m68k.h> | |
148 | ||
149 | #elif defined(__riscv) | |
150 | ||
151 | #define URCU_ARCH_RISCV 1 | |
152 | #include <urcu/arch/riscv.h> | |
153 | ||
154 | #else | |
155 | #error "Cannot build: unrecognized architecture, see <urcu/arch.h>." | |
156 | #endif | |
157 | ||
158 | ||
159 | #endif /* _URCU_ARCH_H */ |