From 701dd8de2ad86c7078285224ba971e114b12a8c8 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Thu, 10 Dec 2009 14:20:16 -0500 Subject: [PATCH] Consider __NO_LWSYNC__ This is set by the gcc when the target does not support the lwsync opcode. This is the case for e500 core based CPUs. I haven't touch tests/api_ppc.h because I don't see any users. Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Mathieu Desnoyers --- urcu/uatomic_arch_ppc.h | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h index b732b08..2322c97 100644 --- a/urcu/uatomic_arch_ppc.h +++ b/urcu/uatomic_arch_ppc.h @@ -35,6 +35,12 @@ extern "C" { #endif #endif +#ifdef __NO_LWSYNC__ +#define LWSYNC_OPCODE "sync\n" +#else +#define LWSYNC_OPCODE "lwsync\n" +#endif + #ifndef BITS_PER_LONG #define BITS_PER_LONG (__SIZEOF_LONG__ * 8) #endif @@ -62,7 +68,7 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len) unsigned int result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ "stwcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ @@ -79,7 +85,7 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len) unsigned long result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "stdcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ @@ -113,7 +119,7 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, unsigned int old_val; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ "cmpd %0,%3\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ @@ -134,7 +140,7 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, unsigned long old_val; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "cmpd %0,%3\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ @@ -175,7 +181,7 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, unsigned int result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ "add %0,%2,%0\n" /* add val to value loaded */ "stwcx. %0,0,%1\n" /* store conditional */ @@ -193,7 +199,7 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, unsigned long result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "add %0,%2,%0\n" /* add val to value loaded */ "stdcx. %0,0,%1\n" /* store conditional */ -- 2.34.1