Other timing tests, update cache line size

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>

diff --git a/test_perthreadlock_timing.c b/test_perthreadlock_timing.c
index 625f999daf4d404ce1af78f3ebb1909e18d2da2a..3e8268b6d7085c15d6a5de4ee1124ebcac77efca 100644 (file)
--- a/test_perthreadlock_timing.c
+++ b/test_perthreadlock_timing.c
@@ -33,6 +33,9 @@
 #include <pthread.h>
 #include <arch.h>
 
+/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
+#define CACHE_LINE_SIZE 4096
+
 #if defined(_syscall0)
 _syscall0(pid_t, gettid)
 #elif defined(__NR_gettid)
@@ -58,7 +61,7 @@ static struct test_array test_array = { 8 };
 
 struct per_thread_lock {
        pthread_mutex_t lock;
-} __attribute__((aligned(128)));       /* cache-line aligned */
+} __attribute__((aligned(CACHE_LINE_SIZE)));   /* cache-line aligned */
 
 static struct per_thread_lock *per_thread_lock;
 
@@ -76,8 +79,8 @@ static int num_write;
 #define NR_READ num_read
 #define NR_WRITE num_write
 
-static cycles_t __attribute__((aligned(128))) *reader_time;
-static cycles_t __attribute__((aligned(128))) *writer_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *reader_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *writer_time;
 
 void *thr_reader(void *arg)
 {

diff --git a/test_qsbr_timing.c b/test_qsbr_timing.c
index e296ced657d8d28a3d3fa74fd62669046e1e6e74..e46a435d8d53ee68dce0032c78dbb2cb8cadeb29 100644 (file)
--- a/test_qsbr_timing.c
+++ b/test_qsbr_timing.c
@@ -32,6 +32,9 @@
 #include <sys/syscall.h>
 #include <arch.h>
 
+/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
+#define CACHE_LINE_SIZE 4096
+
 #if defined(_syscall0)
 _syscall0(pid_t, gettid)
 #elif defined(__NR_gettid)
@@ -93,8 +96,8 @@ static int num_write;
 #define NR_READ num_read
 #define NR_WRITE num_write
 
-static cycles_t __attribute__((aligned(128))) *reader_time;
-static cycles_t __attribute__((aligned(128))) *writer_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *reader_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *writer_time;
 
 void *thr_reader(void *arg)
 {

diff --git a/test_rwlock_timing.c b/test_rwlock_timing.c
index cd2087650437b9d8be01896fcc920112c100513a..4884e4dc2a4840ad7db45311684d87f673a32e02 100644 (file)
--- a/test_rwlock_timing.c
+++ b/test_rwlock_timing.c
@@ -33,6 +33,9 @@
 #include <pthread.h>
 #include <arch.h>
 
+/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
+#define CACHE_LINE_SIZE 4096
+
 #if defined(_syscall0)
 _syscall0(pid_t, gettid)
 #elif defined(__NR_gettid)
@@ -72,8 +75,8 @@ static int num_write;
 #define NR_READ num_read
 #define NR_WRITE num_write
 
-static cycles_t __attribute__((aligned(128))) *reader_time;
-static cycles_t __attribute__((aligned(128))) *writer_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *reader_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *writer_time;
 
 void *thr_reader(void *arg)
 {

diff --git a/test_urcu_timing.c b/test_urcu_timing.c
index 5f75bae448ee3a3e883377e3a6e284c725df7fc7..8577b8f092e472f2e25fc5e0e4c10d070320a949 100644 (file)
--- a/test_urcu_timing.c
+++ b/test_urcu_timing.c
@@ -32,6 +32,9 @@
 #include <sys/syscall.h>
 #include <arch.h>
 
+/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
+#define CACHE_LINE_SIZE 4096
+
 #if defined(_syscall0)
 _syscall0(pid_t, gettid)
 #elif defined(__NR_gettid)
@@ -93,8 +96,8 @@ static int num_write;
 #define NR_READ num_read
 #define NR_WRITE num_write
 
-static cycles_t __attribute__((aligned(128))) *reader_time;
-static cycles_t __attribute__((aligned(128))) *writer_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *reader_time;
+static cycles_t __attribute__((aligned(CACHE_LINE_SIZE))) *writer_time;
 
 void *thr_reader(void *arg)
 {