X-Git-Url: https://git.liburcu.org/?p=urcu.git;a=blobdiff_plain;f=urcu%2Farch_ppc.h;h=7a217c837dfb1cba0aad10ee0495e4d9adddd6e6;hp=1e096dbb893eca6e0cca03aba5858c7cee44f5c6;hb=3d02c34dba0edc4a3554a3862a2ae96d77b3b4e8;hpb=e4d1eb09301904b56cdf22e1d6042df4492d57cb

diff --git a/urcu/arch_ppc.h b/urcu/arch_ppc.h
index 1e096db..7a217c8 100644
--- a/urcu/arch_ppc.h
+++ b/urcu/arch_ppc.h
@@ -5,13 +5,13 @@
  * arch_ppc.h: trivial definitions for the powerpc architecture.
  *
  * Copyright (c) 2009 Paul E. McKenney, IBM Corporation.
- * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
+ * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
  *
  * This library is free software; you can redistribute it and/or
  * modify it under the terms of the GNU Lesser General Public
  * License as published by the Free Software Foundation; either
  * version 2.1 of the License, or (at your option) any later version.
-*
+ *
  * This library is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
@@ -32,17 +32,8 @@ extern "C" {
 /* Include size of POWER5+ L3 cache lines: 256 bytes */
 #define CACHE_LINE_SIZE	256
 
-#ifndef BITS_PER_LONG
-#define BITS_PER_LONG	(__SIZEOF_LONG__ * 8)
-#endif
-
 #define mb()    asm volatile("sync":::"memory")
 
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- */
-#define sync_core()	asm volatile("isync" : : : "memory")
-
 #define mftbl()						\
 	({ 						\
 		unsigned long rval;			\