9d3d452b961b3dd3e74a99147a2b6012688685d0
[urcu.git] / urcu / arch_s390.h
1 #ifndef _URCU_ARCH_S390_H
2 #define _URCU_ARCH_S390_H
3
4 /*
5 * Trivial definitions for the S390 architecture based on information from the
6 * Principles of Operation "CPU Serialization" (5-91), "BRANCH ON CONDITION"
7 * (7-25) and "STORE CLOCK" (7-169).
8 *
9 * Copyright (c) 2009 Novell, Inc.
10 * Author: Jan Blunck <jblunck@suse.de>
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a copy
13 * of this software and associated documentation files (the "Software"), to
14 * deal in the Software without restriction, including without limitation the
15 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
16 * sell copies of the Software, and to permit persons to whom the Software is
17 * furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice shall be included in
20 * all copies or substantial portions of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
25 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 * IN THE SOFTWARE.
29 */
30
31 #include <compiler.h>
32 #include <urcu/config.h>
33
34 #define CONFIG_HAVE_MEM_COHERENCY
35
36 #define CACHE_LINE_SIZE 128
37
38 #ifndef __SIZEOF_LONG__
39 #ifdef __s390x__
40 #define __SIZEOF_LONG__ 8
41 #else
42 #define __SIZEOF_LONG__ 4
43 #endif
44 #endif
45
46 #ifndef BITS_PER_LONG
47 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
48 #endif
49
50 #define mb() __asm__ __volatile__("bcr 15,0" : : : "memory")
51 #define rmb() __asm__ __volatile__("bcr 15,0" : : : "memory");
52 #define wmb() __asm__ __volatile__("bcr 15,0" : : : "memory");
53 #define mc() barrier()
54 #define rmc() barrier()
55 #define wmc() barrier()
56
57 #ifdef CONFIG_URCU_SMP
58 #define smp_mb() mb()
59 #define smp_rmb() rmb()
60 #define smp_wmb() wmb()
61 #define smp_mc() mc()
62 #define smp_rmc() rmc()
63 #define smp_wmc() wmc()
64 #else
65 #define smp_mb() barrier()
66 #define smp_rmb() barrier()
67 #define smp_wmb() barrier()
68 #define smp_mc() barrier()
69 #define smp_rmc() barrier()
70 #define smp_wmc() barrier()
71 #endif
72
73 /* Nop everywhere except on alpha. */
74 #define smp_read_barrier_depends()
75
76 static inline void cpu_relax(void)
77 {
78 barrier();
79 }
80
81 static inline void sync_core()
82 {
83 __asm__ __volatile__("bcr 15,0" : : : "memory");
84 }
85
86 typedef unsigned long long cycles_t;
87
88 static inline cycles_t get_cycles (void)
89 {
90 cycles_t cycles;
91
92 __asm__ __volatile__("stck %0" : "=m" (cycles) : : "cc", "memory" );
93
94 return cycles;
95 }
96
97 #endif /* _URCU_ARCH_S390_H */
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