Force build failure on unknown architectures
[urcu.git] / urcu / arch_x86.h
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1#ifndef _URCU_ARCH_X86_H
2#define _URCU_ARCH_X86_H
121a5d44 3
6d0ce021 4/*
af02d47e 5 * arch_x86.h: trivial definitions for the x86 architecture.
6d0ce021 6 *
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7 * Copyright (c) 2009 Paul E. McKenney, IBM Corporation.
8 * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
6d0ce021 9 *
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10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public
12 * License as published by the Free Software Foundation; either
13 * version 2.1 of the License, or (at your option) any later version.
14*
15 * This library is distributed in the hope that it will be useful,
6d0ce021 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
6d0ce021 19 *
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20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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23 */
24
ec4e58a3 25#include <urcu/compiler.h>
c96a3726 26#include <urcu/config.h>
121a5d44 27
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28#ifdef __cplusplus
29extern "C" {
30#endif
31
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32#define CACHE_LINE_SIZE 128
33
02be5561 34#ifdef CONFIG_RCU_HAVE_FENCE
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35#define mb() asm volatile("mfence":::"memory")
36#define rmb() asm volatile("lfence":::"memory")
37#define wmb() asm volatile("sfence"::: "memory")
38#else
39/*
40 * Some non-Intel clones support out of order store. wmb() ceases to be a
41 * nop for these.
42 */
43#define mb() asm volatile("lock; addl $0,0(%%esp)":::"memory")
44#define rmb() asm volatile("lock; addl $0,0(%%esp)":::"memory")
45#define wmb() asm volatile("lock; addl $0,0(%%esp)"::: "memory")
46#endif
47
e4d1eb09 48#define cpu_relax() asm volatile("rep; nop" : : : "memory");
6d0ce021 49
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50#define rdtscll(val) \
51 do { \
52 unsigned int __a, __d; \
53 asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \
54 (val) = ((unsigned long long)__a) \
55 | (((unsigned long long)__d) << 32); \
56 } while(0)
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57
58typedef unsigned long long cycles_t;
59
af02d47e 60static inline cycles_t get_cycles(void)
6d0ce021 61{
af02d47e 62 cycles_t ret = 0;
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63
64 rdtscll(ret);
65 return ret;
66}
121a5d44 67
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68#ifdef __cplusplus
69}
70#endif
71
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72#include <urcu/arch_generic.h>
73
ec4e58a3 74#endif /* _URCU_ARCH_X86_H */
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