projects / urcu.git / blame
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|---|---|---|
| ac26f1a8 JB |
1 | #ifndef _ARCH_S390_H |
| 2 | #define _ARCH_S390_H | |
| 3 | ||
| 4 | /* | |
| 7039fa6f JB |
5 | * Trivial definitions for the S390 architecture based on information from the |
| 6 | * Principles of Operation "CPU Serialization" (5-91), "BRANCH ON CONDITION" | |
| 7 | * (7-25) and "STORE CLOCK" (7-169). | |
| ac26f1a8 | 8 | * |
| 7039fa6f | 9 | * Copyright (c) 2009 Novell, Inc. |
| ac26f1a8 JB |
10 | * Author: Jan Blunck <jblunck@suse.de> |
| 11 | * | |
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12 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 13 | * of this software and associated documentation files (the "Software"), to | |
| 14 | * deal in the Software without restriction, including without limitation the | |
| 15 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | |
| 16 | * sell copies of the Software, and to permit persons to whom the Software is | |
| 17 | * furnished to do so, subject to the following conditions: | |
| ac26f1a8 | 18 | * |
| 7039fa6f JB |
19 | * The above copyright notice and this permission notice shall be included in |
| 20 | * all copies or substantial portions of the Software. | |
| ac26f1a8 | 21 | * |
| 7039fa6f JB |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 24 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |
| 25 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
| 26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
| 28 | * IN THE SOFTWARE. | |
| ac26f1a8 JB |
29 | */ |
| 30 | ||
| 31 | #include <compiler.h> | |
| c96a3726 | 32 | #include <config/config.h> |
| ac26f1a8 JB |
33 | |
| 34 | #define CONFIG_HAVE_MEM_COHERENCY | |
| ac26f1a8 JB |
35 | |
| 36 | #ifndef BITS_PER_LONG | |
| 37 | #define BITS_PER_LONG (__SIZEOF_LONG__ * 8) | |
| 38 | #endif | |
| 39 | ||
| 40 | #define mb() __asm__ __volatile__("bcr 15,0" : : : "memory") | |
| 41 | #define rmb() __asm__ __volatile__("bcr 15,0" : : : "memory"); | |
| 42 | #define wmb() __asm__ __volatile__("bcr 15,0" : : : "memory"); | |
| 43 | #define mc() barrier() | |
| 44 | #define rmc() barrier() | |
| 45 | #define wmc() barrier() | |
| 46 | ||
| 49617de1 | 47 | #ifdef CONFIG_URCU_SMP |
| ac26f1a8 JB |
48 | #define smp_mb() mb() |
| 49 | #define smp_rmb() rmb() | |
| 50 | #define smp_wmb() wmb() | |
| 51 | #define smp_mc() mc() | |
| 52 | #define smp_rmc() rmc() | |
| 53 | #define smp_wmc() wmc() | |
| 49617de1 MD |
54 | #else |
| 55 | #define smp_mb() barrier() | |
| 56 | #define smp_rmb() barrier() | |
| 57 | #define smp_wmb() barrier() | |
| 58 | #define smp_mc() barrier() | |
| 59 | #define smp_rmc() barrier() | |
| 60 | #define smp_wmc() barrier() | |
| 61 | #endif | |
| ac26f1a8 JB |
62 | |
| 63 | /* Nop everywhere except on alpha. */ | |
| 64 | #define smp_read_barrier_depends() | |
| 65 | ||
| 66 | static inline void cpu_relax(void) | |
| 67 | { | |
| 68 | barrier(); | |
| 69 | } | |
| 70 | ||
| 71 | static inline void sync_core() | |
| 72 | { | |
| 73 | __asm__ __volatile__("bcr 15,0" : : : "memory"); | |
| 74 | } | |
| 75 | ||
| 76 | typedef unsigned long long cycles_t; | |
| 77 | ||
| 78 | static inline cycles_t get_cycles (void) | |
| 79 | { | |
| 80 | cycles_t cycles; | |
| 81 | ||
| 82 | __asm__ __volatile__("stck %0" : "=m" (cycles) : : "cc", "memory" ); | |
| 83 | ||
| 84 | return cycles; | |
| 85 | } | |
| 86 | ||
| 87 | #endif /* _ARCH_S390_H */ |