X-Git-Url: https://git.liburcu.org/?a=blobdiff_plain;f=urcu%2Fuatomic_arch_ppc.h;h=bb74934fb19a279dfe43d7f1785ea89865756193;hb=85b577030e0dd244ed2d42aa5196a088e1e64dbb;hp=68b5faaf7c0510f41455bb4ac1b08edbccda8102;hpb=7d413817f09b2d17b1a79ea012590609ffab5eb6;p=urcu.git diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h index 68b5faa..bb74934 100644 --- a/urcu/uatomic_arch_ppc.h +++ b/urcu/uatomic_arch_ppc.h @@ -21,28 +21,20 @@ */ #include +#include -#ifndef __SIZEOF_LONG__ -#ifdef __powerpc64__ -#define __SIZEOF_LONG__ 8 -#else -#define __SIZEOF_LONG__ 4 -#endif -#endif +#ifdef __cplusplus +extern "C" { +#endif -#ifndef BITS_PER_LONG -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) +#ifdef __NO_LWSYNC__ +#define LWSYNC_OPCODE "sync\n" +#else +#define LWSYNC_OPCODE "lwsync\n" #endif #define ILLEGAL_INSTR ".long 0xd00d00" -#define uatomic_set(addr, v) \ -do { \ - ACCESS_ONCE(*(addr)) = (v); \ -} while (0) - -#define uatomic_read(addr) ACCESS_ONCE(*(addr)) - /* * Using a isync as second barrier for exchange to provide acquire semantic. * According to uatomic_ops/sysdeps/gcc/powerpc.h, the documentation is "fairly @@ -61,7 +53,7 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len) unsigned int result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ "stwcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ @@ -72,13 +64,13 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len) return result; } -#if (BITS_PER_LONG == 64) +#if (CAA_BITS_PER_LONG == 64) case 8: { unsigned long result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "stdcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ @@ -112,9 +104,9 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, unsigned int old_val; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ - "cmpd %0,%3\n" /* if load is not equal to */ + "cmpw %0,%3\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ "stwcx. %2,0,%1\n" /* else store conditional */ "bne- 1b\n" /* retry if lost reservation */ @@ -127,13 +119,13 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, return old_val; } -#if (BITS_PER_LONG == 64) +#if (CAA_BITS_PER_LONG == 64) case 8: { unsigned long old_val; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "cmpd %0,%3\n" /* if load is not equal to */ "bne 2f\n" /* old, fail */ @@ -141,7 +133,7 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, "bne- 1b\n" /* retry if lost reservation */ "isync\n" "2:\n" - : "=&r"(old_val), + : "=&r"(old_val) : "r"(addr), "r"((unsigned long)_new), "r"((unsigned long)old) : "memory", "cc"); @@ -174,7 +166,7 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, unsigned int result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "lwarx %0,0,%1\n" /* load and reserve */ "add %0,%2,%0\n" /* add val to value loaded */ "stwcx. %0,0,%1\n" /* store conditional */ @@ -186,13 +178,13 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, return result; } -#if (BITS_PER_LONG == 64) +#if (CAA_BITS_PER_LONG == 64) case 8: { unsigned long result; __asm__ __volatile__( - "lwsync\n" + LWSYNC_OPCODE "1:\t" "ldarx %0,0,%1\n" /* load and reserve */ "add %0,%2,%0\n" /* add val to value loaded */ "stdcx. %0,0,%1\n" /* store conditional */ @@ -218,17 +210,10 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val, (unsigned long)(v), \ sizeof(*(addr)))) -/* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */ - -#define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v)) - -#define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v)) -#define uatomic_sub(addr, v) (void)uatomic_sub_return((addr), (v)) - -#define uatomic_inc(addr) uatomic_add((addr), 1) -#define uatomic_dec(addr) uatomic_add((addr), -1) +#ifdef __cplusplus +} +#endif -#define URCU_CAS_AVAIL() 1 -#define compat_uatomic_cmpxchg(ptr, old, _new) uatomic_cmpxchg(ptr, old, _new) +#include #endif /* _URCU_ARCH_UATOMIC_PPC_H */