X-Git-Url: https://git.liburcu.org/?a=blobdiff_plain;f=arch_atomic_ppc.h;h=88b366e4de54056ed3d5e2b9bf15374fb29f22f2;hb=04eb9c4f11a43e4cd7307d319b2d5f7624cd2801;hp=231a57798598e3da844d6938a95d9502b402da86;hpb=f689dcbc075f17e1382bc560ce41b273173a9f46;p=urcu.git

diff --git a/arch_atomic_ppc.h b/arch_atomic_ppc.h
index 231a577..88b366e 100644
--- a/arch_atomic_ppc.h
+++ b/arch_atomic_ppc.h
@@ -36,6 +36,13 @@
 
 #ifndef _INCLUDE_API_H
 
+#define atomic_set(addr, v)				\
+do {							\
+	ACCESS_ONCE(*(addr)) = (v);			\
+} while (0)
+
+#define atomic_read(addr)	ACCESS_ONCE(*(addr))
+
 /*
  * Using a isync as second barrier for exchange to provide acquire semantic.
  * According to atomic_ops/sysdeps/gcc/powerpc.h, the documentation is "fairly
@@ -46,7 +53,7 @@
 /* xchg */
 
 static __attribute__((always_inline))
-unsigned long _atomic_exchange(volatile void *addr, unsigned long val, int len)
+unsigned long _atomic_exchange(void *addr, unsigned long val, int len)
 {
 	switch (len) {
 	case 4:
@@ -96,7 +103,7 @@ unsigned long _atomic_exchange(volatile void *addr, unsigned long val, int len)
 /* cmpxchg */
 
 static __attribute__((always_inline))
-unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
+unsigned long _atomic_cmpxchg(void *addr, unsigned long old,
 			      unsigned long _new, int len)
 {
 	switch (len) {
@@ -113,7 +120,7 @@ unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
 			"bne- 1b\n"	 	/* retry if lost reservation */
 			"isync\n"
 		"2:\n"
-				: "=&r"(old_val),
+				: "=&r"(old_val)
 				: "r"(addr), "r"((unsigned int)_new),
 				  "r"((unsigned int)old)
 				: "memory", "cc");
@@ -156,7 +163,7 @@ unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
 /* atomic_add_return */
 
 static __attribute__((always_inline))
-unsigned long _atomic_add_return(volatile void *addr, unsigned long val,
+unsigned long _atomic_add_return(void *addr, unsigned long val,
 				 int len)
 {
 	switch (len) {