uatomic: add memory barrier API for and/or/add/sub/inc/sub
authorMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Tue, 8 May 2012 20:47:28 +0000 (16:47 -0400)
committerMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Tue, 8 May 2012 20:47:28 +0000 (16:47 -0400)
Implement:
cmm_smp_mb__before_and, cmm_smp_mb__after_and
cmm_smp_mb__before_or, cmm_smp_mb__after_or
cmm_smp_mb__before_add, cmm_smp_mb__after_add
cmm_smp_mb__before_sub, cmm_smp_mb__after_sub
cmm_smp_mb__before_inc, cmm_smp_mb__after_inc
cmm_smp_mb__before_dec, cmm_smp_mb__after_dec

For generic and x86.

These currently translate into simple compiler barriers on all
architectures, but the and/or/add/sub/inc/dec uatomics do not provide
memory ordering guarantees (only uatomic_add_return, uatomic_sub_return,
uatomic_xchg, and uatomic_cmpxchg provides full memory barrier
guarantees before and after the atomic operations).

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

No differences found
This page took 0.026271 seconds and 4 git commands to generate.