/*
* Architectures without cache coherency need something like the following:
*
- * #define cmm_mc() arch_cache_flush()
+ * #define cmm_mc() arch_cache_flush()
* #define cmm_rmc() arch_cache_flush_read()
* #define cmm_wmc() arch_cache_flush_write()
*
#define caa_cpu_relax() cmm_barrier()
#endif
+#ifndef HAS_CAA_GET_CYCLES
+#define HAS_CAA_GET_CYCLES
+typedef unsigned long long cycles_t;
+
+static inline cycles_t caa_get_cycles (void)
+{
+ cycles_t thetime;
+ struct timeval tv;
+
+ if (gettimeofday(&tv, NULL) != 0)
+ return 0;
+ thetime = ((cycles_t)tv.tv_sec) * 1000000ULL + ((cycles_t)tv.tv_usec);
+ return (cycles_t)thetime;
+}
+#endif /* HAS_CAA_GET_CYCLES */
+
#ifdef __cplusplus
}
#endif