#include <sys/syscall.h>
#include <sched.h>
-#include "../arch.h"
+#include <urcu/arch.h>
/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
#define CACHE_LINE_SIZE 4096
#else
#define debug_yield_read()
#endif
-#include "../urcu.h"
-#include "../urcu-defer.h"
+#include <urcu.h>
+#include <urcu-defer.h>
struct test_array {
int a;
new->a = 8;
old = rcu_xchg_pointer(&test_rcu_pointer, new);
call_rcu(free, old);
-#if 0
call_rcu(test_cb1, old);
call_rcu(test_cb1, (void *)-2L);
call_rcu(test_cb1, (void *)-2L);
call_rcu(test_cb1, old);
call_rcu(test_cb2, (void *)-2L);
-#endif //0
call_rcu(test_cb2, (void *)-4L);
- //call_rcu(test_cb2, (void *)-2L);
+ call_rcu(test_cb2, (void *)-2L);
nr_writes++;
if (unlikely(!test_duration_write()))
break;