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Stay safe on i686 fence compatibility
[urcu.git]
/
tests
/
test_rwlock_timing.c
diff --git
a/tests/test_rwlock_timing.c
b/tests/test_rwlock_timing.c
index b26f83dcc9035c20ea878896bc8b1477eaa64a76..c5c947895458d19311f8ff8774f8579cfc521fc7 100644
(file)
--- a/
tests/test_rwlock_timing.c
+++ b/
tests/test_rwlock_timing.c
@@
-33,9
+33,6
@@
#include <pthread.h>
#include <urcu/arch.h>
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
-
#if defined(_syscall0)
_syscall0(pid_t, gettid)
#elif defined(__NR_gettid)
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