#include <sys/syscall.h>
#include <sched.h>
-#include "../arch.h"
-
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
+#include <urcu/arch.h>
/* hardcoded number of CPUs */
#define NR_CPUS 16384
#else
#define debug_yield_read()
#endif
-#include "../urcu-qsbr.h"
+#include "urcu-qsbr.h"
struct test_array {
int a;
for (;;) {
new = test_array_alloc();
new->a = 8;
- old = rcu_publish_content(&test_rcu_pointer, new);
+ old = rcu_xchg_pointer(&test_rcu_pointer, new);
+ synchronize_rcu();
/* can be done after unlock */
if (old)
old->a = 0;