Fix: revise urcu_read_lock_update() comment

[urcu.git] / include / urcu / static / urcu-signal.h

diff --git a/include/urcu/static/urcu-signal.h b/include/urcu/static/urcu-signal.h
index 56730e17d449494f81ba41d4f00e86a0178f21f6..707eaf8b785f3c44abe6aa8bcba3a5280de6ebdd 100644 (file)
--- a/include/urcu/static/urcu-signal.h
+++ b/include/urcu/static/urcu-signal.h
@@ -34,6 +34,7 @@
 #include <unistd.h>
 #include <stdint.h>
 
+#include <urcu/debug.h>
 #include <urcu/config.h>
 #include <urcu/compiler.h>
 #include <urcu/arch.h>
@@ -42,7 +43,6 @@
 #include <urcu/list.h>
 #include <urcu/futex.h>
 #include <urcu/tls-compat.h>
-#include <urcu/debug.h>
 #include <urcu/static/urcu-common.h>
 #include <urcu/static/urcu-signal-nr.h>
 
@@ -64,9 +64,9 @@ extern DECLARE_URCU_TLS(struct urcu_reader, urcu_signal_reader);
 
 /*
  * Helper for _rcu_read_lock().  The format of urcu_signal_gp.ctr (as well as
- * the per-thread rcu_reader.ctr) has the upper bits containing a count of
- * _rcu_read_lock() nesting, and a lower-order bit that contains either zero
- * or URCU_GP_CTR_PHASE.  The cmm_barrier() ensures that the accesses in
+ * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
+ * _rcu_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
+ * that contains either zero or one.  The cmm_barrier() ensures that the accesses in
  * _rcu_read_lock() happen before the subsequent read-side critical section.
  */
 static inline void _urcu_signal_read_lock_update(unsigned long tmp)