projects
/
urcu.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Restrict supported arch ot P6+ on Intel x86 32.
[urcu.git]
/
tests
/
api_x86.h
diff --git
a/tests/api_x86.h
b/tests/api_x86.h
index 77d86a13a0208b5db189a6c17add55c92e262132..4f6e836388ccc2e14693e080a7fcdb12b4b73f40 100644
(file)
--- a/
tests/api_x86.h
+++ b/
tests/api_x86.h
@@
-25,6
+25,8
@@
* to redistribute under later versions of GPL might not be available.
*/
* to redistribute under later versions of GPL might not be available.
*/
+#include <urcu/arch.h>
+
#ifndef __always_inline
#define __always_inline inline
#endif
#ifndef __always_inline
#define __always_inline inline
#endif
@@
-71,7
+73,7
@@
* Machine parameters.
*/
* Machine parameters.
*/
-#define CACHE_LINE_SIZE 64
+/* #define CACHE_LINE_SIZE 64 */
#define ____cacheline_internodealigned_in_smp \
__attribute__((__aligned__(1 << 6)))
#define ____cacheline_internodealigned_in_smp \
__attribute__((__aligned__(1 << 6)))
@@
-359,7
+361,7
@@
__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \
*/
#ifndef CACHE_LINE_SIZE
*/
#ifndef CACHE_LINE_SIZE
-#define CACHE_LINE_SIZE 128
+/* #define CACHE_LINE_SIZE 128 */
#endif /* #ifndef CACHE_LINE_SIZE */
/*
#endif /* #ifndef CACHE_LINE_SIZE */
/*
This page took
0.023897 seconds
and
4
git commands to generate.