9 * Copyright February 2009 - Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
11 * Credits for Paul e. McKenney <paulmck@linux.vnet.ibm.com>
12 * for inspiration coming from the Linux kernel RCU and rcu-preempt.
14 * The barrier, mb, rmb, wmb, atomic_inc, smp_read_barrier_depends, ACCESS_ONCE
15 * and rcu_dereference primitives come from the Linux kernel.
17 * Distributed under GPLv2
23 /* The "volatile" is due to gcc bugs */
24 #define barrier() __asm__ __volatile__("": : :"memory")
26 #define likely(x) __builtin_expect(!!(x), 1)
27 #define unlikely(x) __builtin_expect(!!(x), 0)
29 /* x86 32/64 specific */
30 #define mb() asm volatile("mfence":::"memory")
31 #define rmb() asm volatile("lfence":::"memory")
32 #define wmb() asm volatile("sfence" ::: "memory")
34 static inline void atomic_inc(int *v
)
36 asm volatile("lock; incl %0"
40 #define xchg(ptr, v) \
41 ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
46 #define __xg(x) ((struct __xchg_dummy *)(x))
49 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
50 * Note 2: xchg has side effect, so that attribute volatile is necessary,
51 * but generally the primitive is invalid, *ptr is output argument. --ANK
53 static inline unsigned long __xchg(unsigned long x
, volatile void *ptr
,
58 asm volatile("xchgb %b0,%1"
60 : "m" (*__xg(ptr
)), "0" (x
)
64 asm volatile("xchgw %w0,%1"
66 : "m" (*__xg(ptr
)), "0" (x
)
70 asm volatile("xchgl %k0,%1"
72 : "m" (*__xg(ptr
)), "0" (x
)
76 asm volatile("xchgq %0,%1"
78 : "m" (*__xg(ptr
)), "0" (x
)
85 /* Nop everywhere except on alpha. */
86 #define smp_read_barrier_depends()
89 * Prevent the compiler from merging or refetching accesses. The compiler
90 * is also forbidden from reordering successive instances of ACCESS_ONCE(),
91 * but only when the compiler is aware of some particular ordering. One way
92 * to make the compiler aware of ordering is to put the two invocations of
93 * ACCESS_ONCE() in different C statements.
95 * This macro does absolutely -nothing- to prevent the CPU from reordering,
96 * merging, or refetching absolutely anything at any time. Its main intended
97 * use is to mediate communication between process-level code and irq/NMI
98 * handlers, all running on the same CPU.
100 #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
103 * rcu_dereference - fetch an RCU-protected pointer in an
104 * RCU read-side critical section. This pointer may later
105 * be safely dereferenced.
107 * Inserts memory barriers on architectures that require them
108 * (currently only the Alpha), and, more importantly, documents
109 * exactly which pointers are protected by RCU.
112 #define rcu_dereference(p) ({ \
113 typeof(p) _________p1 = ACCESS_ONCE(p); \
114 smp_read_barrier_depends(); \
118 #define SIGURCU SIGUSR1
125 #define YIELD_READ (1 << 0)
126 #define YIELD_WRITE (1 << 1)
128 extern unsigned int yield_active
;
129 extern unsigned int __thread rand_yield
;
131 static inline void debug_yield_read(void)
133 if (yield_active
& YIELD_READ
)
134 if (rand_r(&rand_yield
) & 0x1)
138 static inline void debug_yield_write(void)
140 if (yield_active
& YIELD_WRITE
)
141 if (rand_r(&rand_yield
) & 0x1)
145 static inline void debug_yield_init(void)
147 rand_yield
= time(NULL
) ^ pthread_self();
150 static inline void debug_yield_read(void)
154 static inline void debug_yield_write(void)
158 static inline void debug_yield_init(void)
165 * The trick here is that RCU_GP_CTR_BIT must be a multiple of 8 so we can use a
166 * full 8-bits, 16-bits or 32-bits bitmask for the lower order bits.
168 #define RCU_GP_COUNT (1UL << 0)
169 /* Use the amount of bits equal to half of the architecture long size */
170 #define RCU_GP_CTR_BIT (1UL << (sizeof(long) << 2))
171 #define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1)
174 * Global quiescent period counter with low-order bits unused.
175 * Using a int rather than a char to eliminate false register dependencies
176 * causing stalls on some architectures.
178 extern long urcu_gp_ctr
;
180 extern long __thread urcu_active_readers
;
182 static inline int rcu_old_gp_ongoing(long *value
)
189 v
= ACCESS_ONCE(*value
);
191 return (v
& RCU_GP_CTR_NEST_MASK
) &&
192 ((v
^ ACCESS_ONCE(urcu_gp_ctr
)) & RCU_GP_CTR_BIT
);
195 static inline void rcu_read_lock(void)
200 tmp
= urcu_active_readers
;
202 if (likely(!(tmp
& RCU_GP_CTR_NEST_MASK
)))
203 urcu_active_readers
= urcu_gp_ctr
;
205 urcu_active_readers
= tmp
+ RCU_GP_COUNT
;
208 * Increment active readers count before accessing the pointer.
209 * See force_mb_all_threads().
215 static inline void rcu_read_unlock(void)
221 * Finish using rcu before decrementing the pointer.
222 * See force_mb_all_threads().
224 urcu_active_readers
-= RCU_GP_COUNT
;
229 * rcu_assign_pointer - assign (publicize) a pointer to a newly
230 * initialized structure that will be dereferenced by RCU read-side
231 * critical sections. Returns the value assigned.
233 * Inserts memory barriers on architectures that require them
234 * (pretty much all of them other than x86), and also prevents
235 * the compiler from reordering the code that initializes the
236 * structure after the pointer assignment. More importantly, this
237 * call documents which pointers will be dereferenced by RCU read-side
241 #define rcu_assign_pointer(p, v) \
243 if (!__builtin_constant_p(v) || \
249 #define rcu_xchg_pointer(p, v) \
251 if (!__builtin_constant_p(v) || \
257 extern void synchronize_rcu(void);
260 * Exchanges the pointer and waits for quiescent state.
261 * The pointer returned can be freed.
263 #define urcu_publish_content(p, v) \
266 debug_yield_write(); \
267 oldptr = rcu_xchg_pointer(p, v); \
273 * Reader thread registration.
275 extern void urcu_register_thread(void);
276 extern void urcu_unregister_thread(void);