Restrict supported arch ot P6+ on Intel x86 32.
[urcu.git] / urcu / system.h
1 #ifndef _URCU_SYSTEM_H
2 #define _URCU_SYSTEM_H
3
4 /*
5 * system.h
6 *
7 * System definitions.
8 *
9 * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
10 *
11 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
12 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
13 *
14 * Permission is hereby granted to use or copy this program
15 * for any purpose, provided the above notices are retained on all copies.
16 * Permission to modify the code and to distribute modified code is granted,
17 * provided the above notices are retained, and a notice that the code was
18 * modified is included with the above copyright notice.
19 */
20
21 #include <urcu/compiler.h>
22 #include <urcu/arch.h>
23
24 /*
25 * Identify a shared load. A smp_rmc() or smp_mc() should come before the load.
26 */
27 #define _LOAD_SHARED(p) ACCESS_ONCE(p)
28
29 /*
30 * Load a data from shared memory, doing a cache flush if required.
31 */
32 #define LOAD_SHARED(p) \
33 ({ \
34 smp_rmc(); \
35 _LOAD_SHARED(p); \
36 })
37
38 /*
39 * Identify a shared store. A smp_wmc() or smp_mc() should follow the store.
40 */
41 #define _STORE_SHARED(x, v) ({ ACCESS_ONCE(x) = (v); })
42
43 /*
44 * Store v into x, where x is located in shared memory. Performs the required
45 * cache flush after writing. Returns v.
46 */
47 #define STORE_SHARED(x, v) \
48 ({ \
49 _STORE_SHARED(x, v); \
50 smp_wmc(); \
51 (v); \
52 })
53
54 #endif /* _URCU_SYSTEM_H */
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