1 #ifndef _ARCH_ATOMIC_PPC_H
2 #define _ARCH_ATOMIC_PPC_H
5 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
6 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
7 * Copyright (c) 1999-2004 Hewlett-Packard Development Company, L.P.
8 * Copyright (c) 2009 Mathieu Desnoyers
10 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
11 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
13 * Permission is hereby granted to use or copy this program
14 * for any purpose, provided the above notices are retained on all copies.
15 * Permission to modify the code and to distribute modified code is granted,
16 * provided the above notices are retained, and a notice that the code was
17 * modified is included with the above copyright notice.
19 * Code inspired from libatomic_ops-1.2, inherited in part from the
20 * Boehm-Demers-Weiser conservative garbage collector.
23 #ifndef __SIZEOF_LONG__
25 #define __SIZEOF_LONG__ 8
27 #define __SIZEOF_LONG__ 4
32 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
35 #define ILLEGAL_INSTR ".long 0xd00d00"
37 #ifndef _INCLUDE_API_H
40 * Using a isync as second barrier for exchange to provide acquire semantic.
41 * According to atomic_ops/sysdeps/gcc/powerpc.h, the documentation is "fairly
42 * explicit that this also has acquire semantics."
43 * Derived from AO_compare_and_swap(), but removed the comparison.
48 static __attribute__((always_inline
))
49 unsigned long _atomic_exchange(volatile void *addr
, unsigned long val
, int len
)
58 "1:\t" "lwarx %0,0,%1\n" /* load and reserve */
59 "stwcx. %2,0,%1\n" /* else store conditional */
60 "bne- 1b\n" /* retry if lost reservation */
68 #if (BITS_PER_LONG == 64)
75 "1:\t" "ldarx %0,0,%1\n" /* load and reserve */
76 "stdcx. %2,0,%1\n" /* else store conditional */
77 "bne- 1b\n" /* retry if lost reservation */
87 /* generate an illegal instruction. Cannot catch this with linker tricks
88 * when optimizations are disabled. */
89 __asm__
__volatile__(ILLEGAL_INSTR
);
93 #define xchg(addr, v) (__typeof__(*(addr))) _atomic_exchange((addr), (v), \
98 static __attribute__((always_inline
))
99 unsigned long _atomic_cmpxchg(volatile void *addr
, unsigned long old
,
100 unsigned long _new
, int len
)
105 unsigned int old_val
;
107 __asm__
__volatile__(
109 "1:\t" "lwarx %0,0,%1\n" /* load and reserve */
110 "cmpd %0,%3\n" /* if load is not equal to */
111 "bne 2f\n" /* old, fail */
112 "stwcx. %2,0,%1\n" /* else store conditional */
113 "bne- 1b\n" /* retry if lost reservation */
117 : "r"(addr
), "r"((unsigned int)_new
),
118 "r"((unsigned int)old
)
123 #if (BITS_PER_LONG == 64)
126 unsigned long old_val
;
128 __asm__
__volatile__(
130 "1:\t" "ldarx %0,0,%1\n" /* load and reserve */
131 "cmpd %0,%3\n" /* if load is not equal to */
132 "bne 2f\n" /* old, fail */
133 "stdcx. %2,0,%1\n" /* else store conditional */
134 "bne- 1b\n" /* retry if lost reservation */
138 : "r"(addr
), "r"((unsigned long)_new
),
139 "r"((unsigned long)old
)
146 /* generate an illegal instruction. Cannot catch this with linker tricks
147 * when optimizations are disabled. */
148 __asm__
__volatile__(ILLEGAL_INSTR
);
152 #define cmpxchg(addr, old, _new) \
153 (__typeof__(*(addr))) _atomic_cmpxchg((addr), (old), (_new), \
156 /* atomic_add_return */
158 static __attribute__((always_inline
))
159 unsigned long _atomic_add_return(volatile void *addr
, unsigned long val
,
167 __asm__
__volatile__(
169 "1:\t" "lwarx %0,0,%1\n" /* load and reserve */
170 "add %0,%2,%0\n" /* add val to value loaded */
171 "stwcx. %0,0,%1\n" /* store conditional */
172 "bne- 1b\n" /* retry if lost reservation */
175 : "r"(addr
), "r"(val
)
180 #if (BITS_PER_LONG == 64)
183 unsigned long result
;
185 __asm__
__volatile__(
187 "1:\t" "ldarx %0,0,%1\n" /* load and reserve */
188 "add %0,%2,%0\n" /* add val to value loaded */
189 "stdcx. %0,0,%1\n" /* store conditional */
190 "bne- 1b\n" /* retry if lost reservation */
193 : "r"(addr
), "r"(val
)
200 /* generate an illegal instruction. Cannot catch this with linker tricks
201 * when optimizations are disabled. */
202 __asm__
__volatile__(ILLEGAL_INSTR
);
206 #define atomic_add_return(addr, v) \
207 (__typeof__(*(addr))) _atomic_add((addr), (v), sizeof(*(addr)))
209 /* atomic_sub_return, atomic_add, atomic_sub, atomic_inc, atomic_dec */
211 #define atomic_sub_return(addr, v) atomic_add_return((addr), -(v))
213 #define atomic_add(addr, v) (void)atomic_add_return((addr), (v))
214 #define atomic_sub(addr, v) (void)atomic_sub_return((addr), (v))
216 #define atomic_inc(addr, v) atomic_add((addr), 1)
217 #define atomic_dec(addr, v) atomic_add((addr), -1)
219 #endif /* #ifndef _INCLUDE_API_H */
221 #endif /* ARCH_ATOMIC_PPC_H */
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