From 55271c137f2480d80f675a8935d28ad22516438e Mon Sep 17 00:00:00 2001 From: Mathieu Desnoyers Date: Sat, 13 Jun 2009 19:10:31 -0400 Subject: [PATCH] Deal with POWER5+ 256B L3 cachefalse sharing for per thread lock Signed-off-by: Mathieu Desnoyers --- test_mutex.c | 9 +++++++-- test_perthreadlock.c | 11 ++++++++--- test_qsbr.c | 3 +++ test_rwlock.c | 3 +++ test_urcu.c | 3 +++ 5 files changed, 24 insertions(+), 5 deletions(-) diff --git a/test_mutex.c b/test_mutex.c index d481810..8b48040 100644 --- a/test_mutex.c +++ b/test_mutex.c @@ -35,6 +35,9 @@ #include "arch.h" +/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ +#define CACHE_LINE_SIZE 4096 + #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid) @@ -104,8 +107,10 @@ static int test_duration_read(void) static unsigned long long __thread nr_writes; static unsigned long long __thread nr_reads; -static unsigned long long __attribute__((aligned(128))) *tot_nr_writes; -static unsigned long long __attribute__((aligned(128))) *tot_nr_reads; +static +unsigned long long __attribute__((aligned(CACHE_LINE_SIZE))) *tot_nr_writes; +static +unsigned long long __attribute__((aligned(CACHE_LINE_SIZE))) *tot_nr_reads; static unsigned int nr_readers; static unsigned int nr_writers; diff --git a/test_perthreadlock.c b/test_perthreadlock.c index 89cce65..3fc4a53 100644 --- a/test_perthreadlock.c +++ b/test_perthreadlock.c @@ -35,6 +35,9 @@ #include "arch.h" +/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ +#define CACHE_LINE_SIZE 4096 + #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid) @@ -63,7 +66,7 @@ struct test_array { struct per_thread_lock { pthread_mutex_t lock; -} __attribute__((aligned(128))); /* cache-line aligned */ +} __attribute__((aligned(CACHE_LINE_SIZE))); /* cache-line aligned */ static struct per_thread_lock *per_thread_lock; @@ -108,8 +111,10 @@ static int test_duration_read(void) static unsigned long long __thread nr_writes; static unsigned long long __thread nr_reads; -static unsigned long long __attribute__((aligned(128))) *tot_nr_writes; -static unsigned long long __attribute__((aligned(128))) *tot_nr_reads; +static +unsigned long long __attribute__((aligned(CACHE_LINE_SIZE))) *tot_nr_writes; +static +unsigned long long __attribute__((aligned(CACHE_LINE_SIZE))) *tot_nr_reads; static unsigned int nr_readers; static unsigned int nr_writers; diff --git a/test_qsbr.c b/test_qsbr.c index dc871dc..2e1a0ec 100644 --- a/test_qsbr.c +++ b/test_qsbr.c @@ -35,6 +35,9 @@ #include "arch.h" +/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ +#define CACHE_LINE_SIZE 4096 + #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid) diff --git a/test_rwlock.c b/test_rwlock.c index 915027d..733263b 100644 --- a/test_rwlock.c +++ b/test_rwlock.c @@ -35,6 +35,9 @@ #include "arch.h" +/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ +#define CACHE_LINE_SIZE 4096 + #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid) diff --git a/test_urcu.c b/test_urcu.c index 696c09e..fc9e8b5 100644 --- a/test_urcu.c +++ b/test_urcu.c @@ -35,6 +35,9 @@ #include "arch.h" +/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ +#define CACHE_LINE_SIZE 4096 + #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid) -- 2.34.1