X-Git-Url: http://git.liburcu.org/?p=urcu.git;a=blobdiff_plain;f=include%2Furcu%2Farch.h;h=fdbec3da5cc07da407203709408038cd129dac33;hp=c4b8bc2307028a70fe62174b00d6b30fcecb6136;hb=HEAD;hpb=c966839e39761d1dcf9fc17450630fdb317ec156

diff --git a/include/urcu/arch.h b/include/urcu/arch.h
index c4b8bc2..5147d30 100644
--- a/include/urcu/arch.h
+++ b/include/urcu/arch.h
@@ -1,22 +1,6 @@
-/*
- * urcu/arch.h
- *
- * Copyright (c) 2020 Michael Jeanson <michael.jeanson@efficios.com>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
+// SPDX-FileCopyrightText: 2020 Michael Jeanson <mjeanson@efficios.com>
+//
+// SPDX-License-Identifier: LGPL-2.1-or-later
 
 #ifndef _URCU_ARCH_H
 #define _URCU_ARCH_H
@@ -41,6 +25,7 @@
  * URCU_ARCH_ALPHA : All DEC Alpha variants
  * URCU_ARCH_IA64 : All Intel Itanium variants
  * URCU_ARCH_ARM : All ARM 32 bits variants
+ *   URCU_ARCH_ARMV7 : All ARMv7 ISA variants
  * URCU_ARCH_AARCH64 : All ARM 64 bits variants
  * URCU_ARCH_MIPS : All MIPS variants
  * URCU_ARCH_NIOS2 : All Intel / Altera NIOS II variants
@@ -48,6 +33,7 @@
  * URCU_ARCH_HPPA : All HP PA-RISC variants
  * URCU_ARCH_M68K : All Motorola 68000 variants
  * URCU_ARCH_RISCV : All RISC-V variants
+ * URCU_ARCH_LOONGARCH : All LoongArch variants
  */
 
 #if (defined(__INTEL_OFFLOAD) || defined(__TARGET_ARCH_MIC) || defined(__MIC__))
@@ -63,15 +49,25 @@
 #define URCU_ARCH_AMD64 1
 #include <urcu/arch/x86.h>
 
-#elif (defined(__i486__) || defined(__i586__) || defined(__i686__))
-
-#define URCU_ARCH_X86 1
-#include <urcu/arch/x86.h>
-
 #elif (defined(__i386__) || defined(__i386))
 
 #define URCU_ARCH_X86 1
+
+/*
+ * URCU_ARCH_X86_NO_CAS enables a compat layer that will detect the presence of
+ * the cmpxchg instructions at runtime and provide a compat mode based on a
+ * pthread mutex when it isn't.
+ *
+ * __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 was introduced in GCC 4.3 and Clang 3.3,
+ * building with older compilers will result in the compat layer always being
+ * used on x86-32.
+ */
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+#define URCU_ARCH_X86_NO_CAS 1
+/* For backwards compat */
 #define URCU_ARCH_I386 1
+#endif
+
 #include <urcu/arch/x86.h>
 
 #elif (defined(__powerpc64__) || defined(__ppc64__))
@@ -105,6 +101,12 @@
 #define URCU_ARCH_IA64 1
 #include <urcu/arch/ia64.h>
 
+#elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7__))
+
+#define URCU_ARCH_ARMV7 1
+#define URCU_ARCH_ARM 1
+#include <urcu/arch/arm.h>
+
 #elif (defined(__arm__) || defined(__arm))
 
 #define URCU_ARCH_ARM 1
@@ -150,9 +152,20 @@
 #define URCU_ARCH_RISCV 1
 #include <urcu/arch/riscv.h>
 
+#elif defined(__loongarch__)
+
+#define URCU_ARCH_LOONGARCH 1
+#include <urcu/arch/loongarch.h>
+
 #else
 #error "Cannot build: unrecognized architecture, see <urcu/arch.h>."
 #endif
 
+#ifdef CONFIG_RCU_EMIT_LEGACY_MB
+# define cmm_emit_legacy_smp_mb() cmm_smp_mb()
+#else
+# define cmm_emit_legacy_smp_mb() do { } while (0)
+#endif
+
 
 #endif /* _URCU_ARCH_H */