define CACHE_LINE_SIZE in arch_*.h

[urcu.git] / tests / test_urcu.c

diff --git a/tests/test_urcu.c b/tests/test_urcu.c
index 18683bf3928972cdc6cec5cfaacc753596a4f9a3..3b838c147e2b8ca3ddf866c6218937ac5c8ba2bb 100644 (file)
--- a/tests/test_urcu.c
+++ b/tests/test_urcu.c
@@ -33,10 +33,7 @@
 #include <sys/syscall.h>
 #include <sched.h>
 
-#include "../arch.h"
-
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
+#include <urcu/arch.h>
 
 /* hardcoded number of CPUs */
 #define NR_CPUS 16384
@@ -61,7 +58,7 @@ static inline pid_t gettid(void)
 #else
 #define debug_yield_read()
 #endif
-#include "../urcu.h"
+#include <urcu.h>
 
 struct test_array {
        int a;