define CACHE_LINE_SIZE in arch_*.h

[urcu.git] / tests / test_qsbr_timing.c

diff --git a/tests/test_qsbr_timing.c b/tests/test_qsbr_timing.c
index 2a8963a3dc315110d6f94e6ffba0c21d531c4fd7..bbe983e8da53efba99733c94deb59466157f72b6 100644 (file)
--- a/tests/test_qsbr_timing.c
+++ b/tests/test_qsbr_timing.c
@@ -30,10 +30,7 @@
 #include <stdio.h>
 #include <assert.h>
 #include <sys/syscall.h>
-#include "../arch.h"
-
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
+#include <urcu/arch.h>
 
 #if defined(_syscall0)
 _syscall0(pid_t, gettid)
@@ -51,7 +48,7 @@ static inline pid_t gettid(void)
 #endif
 
 #define _LGPL_SOURCE
-#include "../urcu-qsbr.h"
+#include <urcu-qsbr.h>
 
 pthread_mutex_t rcu_copy_mutex = PTHREAD_MUTEX_INITIALIZER;