fix: handle EINTR correctly in get_cpu_mask_from_sysfs

[urcu.git] / include / urcu / uatomic / riscv.h

diff --git a/include/urcu/uatomic/riscv.h b/include/urcu/uatomic/riscv.h
index a6700e17e2429567fbe1e4e95117bf0c69c7c0f0..c1ba29e2dd1f711236c8ace982f3c75a49961c6d 100644 (file)
--- a/include/urcu/uatomic/riscv.h
+++ b/include/urcu/uatomic/riscv.h
@@ -1,25 +1,11 @@
+// SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com>
+//
+// SPDX-License-Identifier: MIT
+
 /*
- * Atomic exchange operations for the RISC-V architecture. Let GCC do it.
- *
- * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
+ * Atomic exchange operations for the RISC-V architecture.
  *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
+ * Let the compiler do it.
  */
 
 #ifndef _URCU_ARCH_UATOMIC_RISCV_H
@@ -28,6 +14,20 @@
 #include <urcu/compiler.h>
 #include <urcu/system.h>
 
+/*
+ * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details.
+ *
+ * Until the following patches are backported, Userspace RCU is broken for the
+ * RISC-V architecture when compiled with GCC.
+ *
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6>
+ */
+#ifdef URCU_GCC_VERSION
+# error "Implementations of some atomic operations of GCC for RISC-V are insufficient for sequential consistency. For this reason Userspace RCU is currently marked as 'broken' for RISC-V with GCC. However, it is still possible to use other toolchains."
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif