fix: handle EINTR correctly in get_cpu_mask_from_sysfs

[urcu.git] / include / urcu / uatomic / riscv.h

diff --git a/include/urcu/uatomic/riscv.h b/include/urcu/uatomic/riscv.h
index 93131909628a5d66c0d6b527c08e237a195b6f9a..c1ba29e2dd1f711236c8ace982f3c75a49961c6d 100644 (file)
--- a/include/urcu/uatomic/riscv.h
+++ b/include/urcu/uatomic/riscv.h
@@ -3,7 +3,9 @@
 // SPDX-License-Identifier: MIT
 
 /*
- * Atomic exchange operations for the RISC-V architecture. Let GCC do it.
+ * Atomic exchange operations for the RISC-V architecture.
+ *
+ * Let the compiler do it.
  */
 
 #ifndef _URCU_ARCH_UATOMIC_RISCV_H
@@ -12,6 +14,20 @@
 #include <urcu/compiler.h>
 #include <urcu/system.h>
 
+/*
+ * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details.
+ *
+ * Until the following patches are backported, Userspace RCU is broken for the
+ * RISC-V architecture when compiled with GCC.
+ *
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448>
+ *  - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6>
+ */
+#ifdef URCU_GCC_VERSION
+# error "Implementations of some atomic operations of GCC for RISC-V are insufficient for sequential consistency. For this reason Userspace RCU is currently marked as 'broken' for RISC-V with GCC. However, it is still possible to use other toolchains."
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif