uatomic/x86: Remove redundant memory barriers

[urcu.git] / include / urcu / config.h.in

diff --git a/include/urcu/config.h.in b/include/urcu/config.h.in
index faf7817ba257f779a11af5b463973eb045dd1834..473d7a2ec49a076225f5096e7ae65315cfc04aba 100644 (file)
--- a/include/urcu/config.h.in
+++ b/include/urcu/config.h.in
@@ -1,3 +1,7 @@
+// SPDX-FileCopyrightText: 2023 EfficiOS Inc.
+//
+// SPDX-License-Identifier: LGPL-2.1-or-later
+
 /* urcu/config.h.in. Manually generated for control over the contained defs. */
 
 /* Enable SMP support. With SMP support enabled, uniprocessors are also
@@ -5,9 +9,6 @@
    behavior of SMP systems is undefined. */
 #undef CONFIG_RCU_SMP
 
-/* Use the dmb instruction is available for use on ARM. */
-#undef CONFIG_RCU_ARM_HAVE_DMB
-
 /* TLS provided by the compiler. */
 #undef CONFIG_RCU_TLS
 
@@ -22,6 +23,12 @@
    Introduces a performance penalty. */
 #undef CONFIG_RCU_DEBUG
 
+/* Uatomic API uses atomic builtins. */
+#undef CONFIG_RCU_USE_ATOMIC_BUILTINS
+
+/* Emit legacy memory barriers? */
+#undef CONFIG_RCU_EMIT_LEGACY_MB
+
 /* Expose multi-flavor support */
 #define CONFIG_RCU_HAVE_MULTIFLAVOR 1