uatomic/x86: Remove redundant memory barriers

[urcu.git] / include / urcu / config.h.in

diff --git a/include/urcu/config.h.in b/include/urcu/config.h.in
index 15012679f333b273da9b91e3038db5bc35a5be42..473d7a2ec49a076225f5096e7ae65315cfc04aba 100644 (file)
--- a/include/urcu/config.h.in
+++ b/include/urcu/config.h.in
@@ -1,22 +1,14 @@
-/* urcu/config.h.in. Manually generated for control over the contained defs. */
-
-/* Defined when on a system that has memory fence instructions. */
-#undef CONFIG_RCU_HAVE_FENCE
+// SPDX-FileCopyrightText: 2023 EfficiOS Inc.
+//
+// SPDX-License-Identifier: LGPL-2.1-or-later
 
-/* Defined when on a system with futex support. */
-#undef CONFIG_RCU_HAVE_FUTEX
+/* urcu/config.h.in. Manually generated for control over the contained defs. */
 
 /* Enable SMP support. With SMP support enabled, uniprocessors are also
    supported. With SMP support disabled, UP systems work fine, but the
    behavior of SMP systems is undefined. */
 #undef CONFIG_RCU_SMP
 
-/* Compatibility mode for i386 which lacks cmpxchg instruction. */
-#undef CONFIG_RCU_COMPAT_ARCH
-
-/* Use the dmb instruction is available for use on ARM. */
-#undef CONFIG_RCU_ARM_HAVE_DMB
-
 /* TLS provided by the compiler. */
 #undef CONFIG_RCU_TLS
 
@@ -28,11 +20,17 @@
 #undef CONFIG_RCU_FORCE_SYS_MEMBARRIER
 
 /* Enable internal debugging self-checks.
-   Introduce performance penalty. */
+   Introduces a performance penalty. */
 #undef CONFIG_RCU_DEBUG
 
+/* Uatomic API uses atomic builtins. */
+#undef CONFIG_RCU_USE_ATOMIC_BUILTINS
+
+/* Emit legacy memory barriers? */
+#undef CONFIG_RCU_EMIT_LEGACY_MB
+
 /* Expose multi-flavor support */
-#define CONFIG_RCU_MULTIFLAVOR 1
+#define CONFIG_RCU_HAVE_MULTIFLAVOR 1
 
 /* Enable extra debugging checks for lock-free hash table iterator
    traversal. */