uatomic: update atomic set/read, use STORE_SHARED/LOAD_SHARED

[urcu.git] / configure.ac

diff --git a/configure.ac b/configure.ac
index 3a2674753b16bb4163cff611937c59e85744506f..3d772e3a479ed2958172f2be7eb2a6c97cdc0384 100644 (file)
--- a/configure.ac
+++ b/configure.ac
@@ -2,13 +2,13 @@
 # Process this file with autoconf to produce a configure script.
 
 
-AC_INIT([userspace-rcu], [0.2.3-alpha], [mathieu dot desnoyers at polymtl dot ca])
+AC_INIT([userspace-rcu], [0.2.3], [mathieu dot desnoyers at polymtl dot ca])
 AC_CONFIG_AUX_DIR([config])
 AC_CANONICAL_TARGET
 AC_CANONICAL_HOST
 AM_INIT_AUTOMAKE([foreign dist-bzip2 no-dist-gzip])
 AC_CONFIG_SRCDIR([urcu.h])
-AC_PROG_MKDIR_P
+AM_PROG_MKDIR_P
 
 AC_CONFIG_HEADERS([config.h urcu/config.h])
 
@@ -55,7 +55,11 @@ AC_SUBST(ARCHTYPE)
 AC_SUBST(SUBARCHTYPE)
 
 [
-if test "x$ARCHTYPE" = "xx86" -a "x$target_cpu" != "xi386" -a "x$target_cpu" != "xi486" -a "x$target_cpu" != "xi586"; then
+#if test "x$ARCHTYPE" = "xx86" -a "x$target_cpu" != "xi386" -a "x$target_cpu" != "xi486" -a "x$target_cpu" != "xi586"; then
+#For now, using lock; addl compatibility mode even for i686, because the
+#Pentium III is seen as a i686, but lacks mfence instruction.
+#Only using fence for x86_64.
+if test "x$ARCHTYPE" = "xx86" -a "x$target_cpu" != "xi386" -a "x$target_cpu" != "xi486" -a "x$target_cpu" != "xi586" -a "x$target_cpu" != "xi686"; then
 ]
        AC_DEFINE([CONFIG_URCU_HAVE_FENCE], [1])
 [