urcu/arch_s390.h

   1 #ifndef _URCU_ARCH_S390_H
   2 #define _URCU_ARCH_S390_H
   3
   4 /*
   5  * Trivial definitions for the S390 architecture based on information from the
   6  * Principles of Operation "CPU Serialization" (5-91), "BRANCH ON CONDITION"
   7  * (7-25) and "STORE CLOCK" (7-169).
   8  *
   9  * Copyright (c) 2009 Novell, Inc.
  10  * Author: Jan Blunck <jblunck@suse.de>
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a copy
  13  * of this software and associated documentation files (the "Software"), to
  14  * deal in the Software without restriction, including without limitation the
  15  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
  16  * sell copies of the Software, and to permit persons to whom the Software is
  17  * furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice shall be included in
  20  * all copies or substantial portions of the Software.
  21  *
  22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  25  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  28  * IN THE SOFTWARE.
  29  */
  30
  31 #include <compiler.h>
  32 #include <urcu/config.h>
  33
  34 #ifdef __cplusplus
  35 extern "C" {
  36 #endif
  37
  38 #define CONFIG_HAVE_MEM_COHERENCY
  39
  40 #define CACHE_LINE_SIZE 128
  41
  42 #ifndef __SIZEOF_LONG__
  43 #ifdef __s390x__
  44 #define __SIZEOF_LONG__ 8
  45 #else
  46 #define __SIZEOF_LONG__ 4
  47 #endif
  48 #endif
  49
  50 #ifndef BITS_PER_LONG
  51 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
  52 #endif
  53
  54 #define mb()    __asm__ __volatile__("bcr 15,0" : : : "memory")
  55 #define rmb()   __asm__ __volatile__("bcr 15,0" : : : "memory");
  56 #define wmb()   __asm__ __volatile__("bcr 15,0" : : : "memory");
  57 #define mc()    barrier()
  58 #define rmc()   barrier()
  59 #define wmc()   barrier()
  60
  61 #ifdef CONFIG_URCU_SMP
  62 #define smp_mb()        mb()
  63 #define smp_rmb()       rmb()
  64 #define smp_wmb()       wmb()
  65 #define smp_mc()        mc()
  66 #define smp_rmc()       rmc()
  67 #define smp_wmc()       wmc()
  68 #else
  69 #define smp_mb()        barrier()
  70 #define smp_rmb()       barrier()
  71 #define smp_wmb()       barrier()
  72 #define smp_mc()        barrier()
  73 #define smp_rmc()       barrier()
  74 #define smp_wmc()       barrier()
  75 #endif
  76
  77 /* Nop everywhere except on alpha. */
  78 #define smp_read_barrier_depends()
  79
  80 static inline void cpu_relax(void)
  81 {
  82         barrier();
  83 }
  84
  85 static inline void sync_core()
  86 {
  87         __asm__ __volatile__("bcr 15,0" : : : "memory");
  88 }
  89
  90 typedef unsigned long long cycles_t;
  91
  92 static inline cycles_t get_cycles (void)
  93 {
  94         cycles_t cycles;
  95
  96         __asm__ __volatile__("stck %0" : "=m" (cycles) : : "cc", "memory" );
  97
  98         return cycles;
  99 }
 100
 101 #ifdef __cplusplus
 102 }
 103 #endif
 104
 105 #endif /* _URCU_ARCH_S390_H */