Fix: uatomic arm32: add missing release barrier before uatomic_xchg
[urcu.git] / include / urcu / uatomic / arm.h
1 #ifndef _URCU_ARCH_UATOMIC_ARM_H
2 #define _URCU_ARCH_UATOMIC_ARM_H
3
4 /*
5 * Atomics for ARM. This approach is usable on kernels back to 2.6.15.
6 *
7 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
8 * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
9 * Copyright (c) 1999-2004 Hewlett-Packard Development Company, L.P.
10 * Copyright (c) 2009 Mathieu Desnoyers
11 * Copyright (c) 2010 Paul E. McKenney, IBM Corporation
12 * (Adapted from uatomic_arch_ppc.h)
13 *
14 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
15 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
16 *
17 * Permission is hereby granted to use or copy this program
18 * for any purpose, provided the above notices are retained on all copies.
19 * Permission to modify the code and to distribute modified code is granted,
20 * provided the above notices are retained, and a notice that the code was
21 * modified is included with the above copyright notice.
22 *
23 * Code inspired from libuatomic_ops-1.2, inherited in part from the
24 * Boehm-Demers-Weiser conservative garbage collector.
25 */
26
27 #include <urcu/compiler.h>
28 #include <urcu/system.h>
29 #include <urcu/arch.h>
30
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34
35 /* xchg */
36
37 /*
38 * Based on [1], __sync_lock_test_and_set() is not a full barrier, but
39 * instead only an acquire barrier. Given that uatomic_xchg() acts as
40 * both release and acquire barriers, we therefore need to have our own
41 * release barrier before this operation.
42 *
43 * [1] https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
44 */
45 #define uatomic_xchg(addr, v) \
46 ({ \
47 cmm_smp_mb(); \
48 __sync_lock_test_and_set(addr, v); \
49 })
50
51 #ifdef __cplusplus
52 }
53 #endif
54
55 #include <urcu/uatomic/generic.h>
56
57 #endif /* _URCU_ARCH_UATOMIC_ARM_H */
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