Add comment in rcu_add_lock
[urcu.git] / urcu.h
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1#ifndef _URCU_H
2#define _URCU_H
3
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4/*
5 * urcu.h
6 *
7 * Userspace RCU header
8 *
9 * Copyright February 2009 - Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
10 *
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11 * Credits for Paul e. McKenney <paulmck@linux.vnet.ibm.com>
12 * for inspiration coming from the Linux kernel RCU and rcu-preempt.
13 *
14 * The barrier, mb, rmb, wmb, atomic_inc, smp_read_barrier_depends, ACCESS_ONCE
15 * and rcu_dereference primitives come from the Linux kernel.
16 *
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17 * Distributed under GPLv2
18 */
19
1430ee0b 20#include <stdlib.h>
69a757c9 21#include <pthread.h>
1430ee0b 22
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23/* The "volatile" is due to gcc bugs */
24#define barrier() __asm__ __volatile__("": : :"memory")
25
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26#define likely(x) __builtin_expect(!!(x), 1)
27#define unlikely(x) __builtin_expect(!!(x), 0)
28
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29/* x86 32/64 specific */
30#define mb() asm volatile("mfence":::"memory")
31#define rmb() asm volatile("lfence":::"memory")
32#define wmb() asm volatile("sfence" ::: "memory")
33
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34static inline void atomic_inc(int *v)
35{
36 asm volatile("lock; incl %0"
f69f195a 37 : "+m" (*v));
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38}
39
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40#define xchg(ptr, v) \
41 ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
42
43struct __xchg_dummy {
44 unsigned long a[100];
45};
46#define __xg(x) ((struct __xchg_dummy *)(x))
47
48/*
49 * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
50 * Note 2: xchg has side effect, so that attribute volatile is necessary,
51 * but generally the primitive is invalid, *ptr is output argument. --ANK
52 */
53static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
54 int size)
55{
56 switch (size) {
57 case 1:
58 asm volatile("xchgb %b0,%1"
59 : "=q" (x)
60 : "m" (*__xg(ptr)), "0" (x)
61 : "memory");
62 break;
63 case 2:
64 asm volatile("xchgw %w0,%1"
65 : "=r" (x)
66 : "m" (*__xg(ptr)), "0" (x)
67 : "memory");
68 break;
69 case 4:
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70 asm volatile("xchgl %k0,%1"
71 : "=r" (x)
72 : "m" (*__xg(ptr)), "0" (x)
73 : "memory");
74 break;
75 case 8:
76 asm volatile("xchgq %0,%1"
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77 : "=r" (x)
78 : "m" (*__xg(ptr)), "0" (x)
79 : "memory");
80 break;
81 }
82 return x;
83}
84
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85/* Nop everywhere except on alpha. */
86#define smp_read_barrier_depends()
87
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88/*
89 * Prevent the compiler from merging or refetching accesses. The compiler
90 * is also forbidden from reordering successive instances of ACCESS_ONCE(),
91 * but only when the compiler is aware of some particular ordering. One way
92 * to make the compiler aware of ordering is to put the two invocations of
93 * ACCESS_ONCE() in different C statements.
94 *
95 * This macro does absolutely -nothing- to prevent the CPU from reordering,
96 * merging, or refetching absolutely anything at any time. Its main intended
97 * use is to mediate communication between process-level code and irq/NMI
98 * handlers, all running on the same CPU.
99 */
100#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
101
102/**
103 * rcu_dereference - fetch an RCU-protected pointer in an
104 * RCU read-side critical section. This pointer may later
105 * be safely dereferenced.
106 *
107 * Inserts memory barriers on architectures that require them
108 * (currently only the Alpha), and, more importantly, documents
109 * exactly which pointers are protected by RCU.
110 */
111
112#define rcu_dereference(p) ({ \
113 typeof(p) _________p1 = ACCESS_ONCE(p); \
114 smp_read_barrier_depends(); \
115 (_________p1); \
116 })
117
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118#define SIGURCU SIGUSR1
119
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120#ifdef DEBUG_YIELD
121#include <sched.h>
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122#include <time.h>
123#include <pthread.h>
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124
125#define YIELD_READ (1 << 0)
126#define YIELD_WRITE (1 << 1)
127
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128extern unsigned int yield_active;
129extern unsigned int __thread rand_yield;
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130
131static inline void debug_yield_read(void)
132{
133 if (yield_active & YIELD_READ)
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134 if (rand_r(&rand_yield) & 0x1)
135 sched_yield();
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136}
137
138static inline void debug_yield_write(void)
139{
140 if (yield_active & YIELD_WRITE)
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141 if (rand_r(&rand_yield) & 0x1)
142 sched_yield();
143}
144
145static inline void debug_yield_init(void)
146{
147 rand_yield = time(NULL) ^ pthread_self();
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148}
149#else
150static inline void debug_yield_read(void)
151{
152}
153
154static inline void debug_yield_write(void)
155{
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156}
157
158static inline void debug_yield_init(void)
159{
160
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161}
162#endif
163
1430ee0b 164/*
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165 * The trick here is that RCU_GP_CTR_BIT must be a multiple of 8 so we can use a
166 * full 8-bits, 16-bits or 32-bits bitmask for the lower order bits.
1430ee0b 167 */
6e32665b 168#define RCU_GP_COUNT (1UL << 0)
4917a879 169/* Use the amount of bits equal to half of the architecture long size */
6e32665b 170#define RCU_GP_CTR_BIT (1UL << (sizeof(long) << 2))
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171#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1)
172
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173/*
174 * Global quiescent period counter with low-order bits unused.
175 * Using a int rather than a char to eliminate false register dependencies
176 * causing stalls on some architectures.
177 */
6e8b8429 178extern long urcu_gp_ctr;
27b012e2 179
6e8b8429 180extern long __thread urcu_active_readers;
27b012e2 181
128166c9 182static inline int rcu_old_gp_ongoing(long *value)
27b012e2 183{
6e8b8429 184 long v;
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185
186 if (value == NULL)
187 return 0;
188 debug_yield_write();
189 v = ACCESS_ONCE(*value);
190 debug_yield_write();
191 return (v & RCU_GP_CTR_NEST_MASK) &&
192 ((v ^ ACCESS_ONCE(urcu_gp_ctr)) & RCU_GP_CTR_BIT);
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193}
194
1430ee0b 195static inline void rcu_read_lock(void)
27b012e2 196{
6e8b8429 197 long tmp;
1430ee0b 198
cf380c2f 199 debug_yield_read();
1430ee0b 200 tmp = urcu_active_readers;
cf380c2f 201 debug_yield_read();
3a9e6e9d 202 /* urcu_gp_ctr = RCU_GP_COUNT | (~RCU_GP_CTR_BIT or RCU_GP_CTR_BIT) */
5b1da0c8 203 if (likely(!(tmp & RCU_GP_CTR_NEST_MASK)))
128166c9 204 urcu_active_readers = urcu_gp_ctr;
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205 else
206 urcu_active_readers = tmp + RCU_GP_COUNT;
cf380c2f 207 debug_yield_read();
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208 /*
209 * Increment active readers count before accessing the pointer.
210 * See force_mb_all_threads().
211 */
212 barrier();
cf380c2f 213 debug_yield_read();
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214}
215
1430ee0b 216static inline void rcu_read_unlock(void)
27b012e2 217{
cf380c2f 218 debug_yield_read();
27b012e2 219 barrier();
cf380c2f 220 debug_yield_read();
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221 /*
222 * Finish using rcu before decrementing the pointer.
223 * See force_mb_all_threads().
224 */
1430ee0b 225 urcu_active_readers -= RCU_GP_COUNT;
cf380c2f 226 debug_yield_read();
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227}
228
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229/**
230 * rcu_assign_pointer - assign (publicize) a pointer to a newly
231 * initialized structure that will be dereferenced by RCU read-side
232 * critical sections. Returns the value assigned.
233 *
234 * Inserts memory barriers on architectures that require them
235 * (pretty much all of them other than x86), and also prevents
236 * the compiler from reordering the code that initializes the
237 * structure after the pointer assignment. More importantly, this
238 * call documents which pointers will be dereferenced by RCU read-side
239 * code.
240 */
241
242#define rcu_assign_pointer(p, v) \
243 ({ \
244 if (!__builtin_constant_p(v) || \
245 ((v) != NULL)) \
246 wmb(); \
247 (p) = (v); \
248 })
249
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250#define rcu_xchg_pointer(p, v) \
251 ({ \
252 if (!__builtin_constant_p(v) || \
253 ((v) != NULL)) \
254 wmb(); \
255 xchg(p, v); \
256 })
257
e462817e 258extern void synchronize_rcu(void);
27b012e2 259
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260/*
261 * Exchanges the pointer and waits for quiescent state.
262 * The pointer returned can be freed.
263 */
264#define urcu_publish_content(p, v) \
265 ({ \
266 void *oldptr; \
267 debug_yield_write(); \
268 oldptr = rcu_xchg_pointer(p, v); \
269 synchronize_rcu(); \
270 oldptr; \
271 })
272
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273/*
274 * Reader thread registration.
275 */
276extern void urcu_register_thread(void);
5e7e64b9 277extern void urcu_unregister_thread(void);
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278
279#endif /* _URCU_H */
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