projects / urcu.git / blame
| Commit | Line | Data |
|---|---|---|
| fdfad810 MJ |
1 | /* |
| 2 | * Atomic exchange operations for the RISC-V architecture. Let GCC do it. | |
| 3 | * | |
| 4 | * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com> | |
| 5 | * | |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
| 7 | * of this software and associated documentation files (the "Software"), to | |
| 8 | * deal in the Software without restriction, including without limitation the | |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is | |
| 11 | * furnished to do so, subject to the following conditions: | |
| 12 | * | |
| 13 | * The above copyright notice and this permission notice shall be included in | |
| 14 | * all copies or substantial portions of the Software. | |
| 15 | * | |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
| 22 | * IN THE SOFTWARE. | |
| 23 | */ | |
| 24 | ||
| df5fc97b OD |
25 | /* |
| 26 | * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details. | |
| 27 | * | |
| 28 | * Until the following patches are backported, Userspace RCU is broken for the | |
| 29 | * RISC-V architecture when compiled with GCC. | |
| 30 | * | |
| 31 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448> | |
| 32 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448> | |
| 33 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6> | |
| 34 | */ | |
| 35 | #if defined(__GNUC__) | |
| 36 | # error "Implementations of some atomic operations of GCC for RISC-V \ | |
| 37 | are insufficient for sequential consistency. For this reason \ | |
| 38 | Userspace RCU is currently marked as 'broken' for RISC-V with \ | |
| 39 | GCC. However, it is still possible to use other toolchains." | |
| 40 | #endif | |
| 41 | ||
| fdfad810 MJ |
42 | #ifndef _URCU_ARCH_UATOMIC_RISCV_H |
| 43 | #define _URCU_ARCH_UATOMIC_RISCV_H | |
| 44 | ||
| 45 | #include <urcu/compiler.h> | |
| 46 | #include <urcu/system.h> | |
| 47 | ||
| 48 | #ifdef __cplusplus | |
| 49 | extern "C" { | |
| 50 | #endif | |
| 51 | ||
| 52 | #define UATOMIC_HAS_ATOMIC_BYTE | |
| 53 | #define UATOMIC_HAS_ATOMIC_SHORT | |
| 54 | ||
| 55 | #ifdef __cplusplus | |
| 56 | } | |
| 57 | #endif | |
| 58 | ||
| 59 | #include <urcu/uatomic/generic.h> | |
| 60 | ||
| 61 | #endif /* _URCU_ARCH_UATOMIC_RISCV_H */ |