2.6 trace format, lttv 0.12.30
[lttv.git] / doc / developer / lttng-lttv-compatibility.html
index ada5f5af901679e6a6fd2d775af8233bf1707441..e4328944bd1d615e55fce3f56a82e485646bb67c 100644 (file)
@@ -3801,6 +3801,52 @@ powerpc64, s390, sparc, sparc64.<br>
 </tr>
 
 
+<tr>
+<td style="vertical-align: top;">
+0.12.30<br>
+</td>
+<td style="vertical-align: top;">
+0.191<br>
+</td>
+<td style="vertical-align: top;">
+0.76<br>
+0.77<br>
+0.78<br>
+0.79<br>
+</td>
+<td style="vertical-align: top;">
+obsolete<br>
+</td>
+<td style="vertical-align: top;">
+0.6<br>
+</td>
+<td style="vertical-align: top;">
+obsolete<br>
+</td>
+<td style="vertical-align: top;">
+2.6<br>
+</td>
+<td style="vertical-align: top;">
+2.6.32.4<br>
+</td>
+<td style="vertical-align: top;">
+LTTng 0.191, LTTV 0.12.30 coming with trace format 2.6 revert to the pre-2.4
+behavior for alignment of 64-bit fields on 32-bit architectures. It aligns them
+on 32-bit (maximum alignment is the architecture size). This follows gcc
+behavior.<br>
+</td>
+<td style="vertical-align: top;">
+</td>
+<td style="vertical-align: top;">
+x86, alpha, arm26, avr32, cris, frv, h8300, m32r, m68knommu, parisc, sh, sh64,
+um, v850, xtensa.<br>
+arm, i686, ia64, m68k, mips, mipsel, x86_64, powerpc 405,
+powerpc64, s390, sparc, sparc64.<br>
+</td>
+</tr>
+
+
+
 
 
 </tbody>
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