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[lttv.git] / ltt-usertrace / ltt / system-ppc.h

diff --git a/ltt-usertrace/ltt/system-ppc.h b/ltt-usertrace/ltt/system-ppc.h
index 0f13837c8f70ffa1df7c5980a118e366d1e4f4e8..bb842f1a1ceec8af1c13dab5835d926b7b438d12 100644 (file)
--- a/ltt-usertrace/ltt/system-ppc.h
+++ b/ltt-usertrace/ltt/system-ppc.h
@@ -7,6 +7,10 @@
 #include <asm/atomic.h>
 #include <asm/hw_irq.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /*
  * Memory barrier.
  * The sync instruction guarantees that all memory accesses initiated
@@ -45,7 +49,7 @@
 #define smp_read_barrier_depends()     do { } while(0)
 #endif /* CONFIG_SMP */
 
-static __inline__ unsigned long
+static inline unsigned long
 xchg_u32(volatile void *p, unsigned long val)
 {
        unsigned long prev;
@@ -95,7 +99,7 @@ extern inline void * xchg_ptr(void * m, void * val)
 
 #define __HAVE_ARCH_CMPXCHG    1
 
-static __inline__ unsigned long
+static inline unsigned long
 __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
 {
        unsigned int prev;
@@ -122,7 +126,7 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
    if something tries to do an invalid cmpxchg().  */
 extern void __cmpxchg_called_with_bad_pointer(void);
 
-static __inline__ unsigned long
+static inline unsigned long
 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 {
        switch (size) {
@@ -147,4 +151,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 
 #define arch_align_stack(x) (x)
 
+#ifdef __cplusplus
+} /* end of extern "C" */
+#endif
+
 #endif /* __PPC_SYSTEM_H */