Fix: revise urcu_read_lock_update() comment

[urcu.git] / include / urcu / static / urcu-mb.h

diff --git a/include/urcu/static/urcu-mb.h b/include/urcu/static/urcu-mb.h
index 20e604da64a1da6096b664f6791d2c8932ec7612..253d29b1a0a546a57240e669b96cc1fcbd6c9ccc 100644 (file)
--- a/include/urcu/static/urcu-mb.h
+++ b/include/urcu/static/urcu-mb.h
@@ -34,6 +34,7 @@
 #include <unistd.h>
 #include <stdint.h>
 
+#include <urcu/debug.h>
 #include <urcu/config.h>
 #include <urcu/compiler.h>
 #include <urcu/arch.h>
@@ -42,7 +43,6 @@
 #include <urcu/list.h>
 #include <urcu/futex.h>
 #include <urcu/tls-compat.h>
-#include <urcu/debug.h>
 #include <urcu/static/urcu-common.h>
 
 #ifdef __cplusplus
@@ -63,9 +63,9 @@ extern DECLARE_URCU_TLS(struct urcu_reader, urcu_mb_reader);
 
 /*
  * Helper for _urcu_mb_read_lock().  The format of urcu_mb_gp.ctr (as well as
- * the per-thread rcu_reader.ctr) has the upper bits containing a count of
- * _urcu_mb_read_lock() nesting, and a lower-order bit that contains either zero
- * or URCU_GP_CTR_PHASE.  The cmm_smp_mb() ensures that the accesses in
+ * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
+ * _urcu_mb_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
+ * that contains either zero or one.  The cmm_smp_mb() ensures that the accesses in
  * _urcu_mb_read_lock() happen before the subsequent read-side critical section.
  */
 static inline void _urcu_mb_read_lock_update(unsigned long tmp)